DP83865DVH

Muhammad Asad Fareed

Other Parts Discussed in Thread: DP83865

We are using National's DP83865DVH in our design. For boundary scan, we are using BSDL model from National Semi-conductor. During boundary scan, when I use DP83865DVH from lot number (VS542AC), the device ID fetched by JTAG tool is 0x1801701F matching with the BSDL. But, when I use DP83865DVH from Lot number (VS925RA), the device id fetch by boundary scan tool is 0x0801701F not matching with the BSDL model. Please Guide. The BSDL works fine for chip with ID 0x1801701F but does not work for 0x0801701F. ]

over 13 years ago

0 John Goldie over 13 years ago

TI__Expert 5175 points

Greetings;

We would suggest to check the DP83865 PHYID registers to help us identify the device revision. These registers are:

PHY Identifier Register #1 (PHYIDR1) address 0x02
PHY Identifier Register #2 (PHYIDR2) address 0x03

Based on current Silicon, and the BSDL file, 0x1801701F is the expected value. Decoded:

   attribute IDCODE_REGISTER of DP83865DVH: entity is
      "0001"             & -- version
      "1000000000010111" & -- part number
      "00000001111"      & -- manufacturer's identity
      "1";                   -- required by 1149.1

Decoding the date codes provided, this appears to be

VS925RA

V = Manufactured in S. Portland Fab
S = Assembled in Singapore
9 = Last digit of Year of Manufacture
25 = Week of Manufacture
RA = Die Run Code

VS542AC

V = Manufactured in S. Portland Fab
S = Assembled in Singapore
5 = Last digit of Year of Manufacture
42 = Week of Manufacture
AC = Die Run Code

Singapore plant was in operation up to 2005. As a guess at this point, the 0x0 part might be early engineering samples from a different version of the part. Besides the date code is there a "ES" mark on the part with the 0x0 value? Please advise on the REG contents also.

Best Regards;
John Goldie
DPS APPS / SVA / www.ti.com

0 Muhammad Asad Fareed over 13 years ago in reply to John Goldie

Prodigy 20 points

Dear John Goldie,

For VS925RA

PHYID1 read: 0x2000

PHYID2 read: 0x5C74 (Not matching as per datasheet)

While for VS542AC

PHYID1 read: 0x2000

PHYID2 read: 0x5C7A (Matching as per datasheet)

Best Regars,

Muhammad Asad Fareed

John Goldie said:

Greetings;

We would suggest to check the DP83865 PHYID registers to help us identify the device revision. These registers are:

PHY Identifier Register #1 (PHYIDR1) address 0x02

PHY Identifier Register #2 (PHYIDR2) address 0x03

Based on current Silicon, and the BSDL file, 0x1801701F is the expected value. Decoded:

   attribute IDCODE_REGISTER of DP83865DVH: entity is
      "0001"             & -- version
      "1000000000010111" & -- part number
      "00000001111"      & -- manufacturer's identity
      "1";                   -- required by 1149.1

Decoding the date codes provided, this appears to be

VS925RA

V = Manufactured in S. Portland Fab

S = Assembled in Singapore

9 = Last digit of Year of Manufacture

25 = Week of Manufacture

RA = Die Run Code

VS542AC

V = Manufactured in S. Portland Fab

S = Assembled in Singapore

5 = Last digit of Year of Manufacture

42 = Week of Manufacture

AC = Die Run Code

Singapore plant was in operation up to 2005. As a guess at this point, the 0x0 part might be early engineering samples from a different version of the part. Besides the date code is there a "ES" mark on the part with the 0x0 value? Please advise on the REG contents also.

Best Regards;
John Goldie
DPS APPS / SVA / www.ti.com

0 John Goldie over 13 years ago in reply to Muhammad Asad Fareed

TI__Expert 5175 points

Greetings - Please contact me direct at john.goldie@ti.com for follow up.

John Goldie

0 hengbin zhao over 13 years ago in reply to John Goldie

Prodigy 10 points

I’m trying to port dp83865 to my custom am335x board. But it can’ work under u-boot.

static struct module_pin_mux rgmii1_pin_mux[] = {

{OFFSET(mii1_col ), MODE(2)}, /* RGMII1_COL */

{OFFSET(mii1_crs), MODE(2)}, /* RGMII1_CRS */

{OFFSET(mii1_rxerr), MODE(2)|RXACTIVE}, /* RGMII1_RXERR */

{OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */

{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */

{OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */

{OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */

{OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */

{OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */

{OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */

{OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */

{OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */

{OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */

{OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */

{OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */

//{OFFSET(mii1_refclk), MODE(2)|RXACTIVE}, /* RGMII1_REFERR */

{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */

{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */

{-1},

};

My setting:

writel(RGMII_MODE_ENABLE, MAC_MII_SEL);

cpsw_data.gigabit_en = 1;

I type the “dhcp” on u-boot console , I ‘m getting the below output.

Retry count exceeded; starting again

phyid1 = 0x2000

phyid1 = 0x5c7a

phy name =cpswAuto Negotitation failed for port 0

BOOTP broadcast 1

BOOTP broadcast 2

BOOTP broadcast 3

BOOTP broadcast 4

BOOTP broadcast 5

BOOTP broadcast 6

BOOTP broadcast 7

BOOTP broadcast 8

BOOTP broadcast 9

BOOTP broadcast 10

Thank you very much!

Interface

Interface forum

DP83865DVH