DP83869HM: Regarding abnormal overshoot and undershoot during SI simulation using ANSYS.

Hi, 

Could you share your simulation schematic so we can check it against ours? Also, what is the MAC impedance model you are using here? This can be caused by low MAC impedance. 

Best,

J

Hi,

Thank you for the reply. Attaching the screenshot for schematic and ibis models used here.

...

The MAC is FPGA - XC7K410T-2FFG900I

Hi, 

Thank you for the simulation schematic. 

We tried simulating it on ADS. Below is our schematic with impedance control '1111':


And you can see the overshoot:



With higher impedance setting ('1001'):


You can see that the overshoot is gone:




Best,
J