Dear Expert
SN65DP159RGZR (C36010005) is a new product for 4K OLED surgical medical displays,
Now there are the following questions that need to be answered by consulting suppliers:
We are doing 4K60HZ HDMI input, but we applied for a sample because the chip levels at the front and rear ends did not match. We added an SN65DP159RGZR chip for level conversion. Currently, our circuit connection is shown in the following figure:
1.Due to the wiring of the output PCB, we performed LANE switching on the output pins of the SN65DP159RGZR chip, and then configured the SN65DP159RGZR chip to switch mode (SWAP=L). However, when tested with an oscilloscope, we found that there was no signal output;
Is this exchange output method not feasible? Can the clock signal only be output from pins PIN25 and PIN26?
2. We have also tried to connect the CLOCK signal to the IN-D2 pin of the chip at the input end, DATE 0 to the IN-D1 pin of the chip, DATE 1 to the IN-D0 pin of the chip, and DATE 2 to the INUCLk pin of the chip, SWAP = Z, Force the working mode to Redriver Mode through I2C configuration registers,
But the clock signal tested with an oscilloscope is intermittent. What could be the reason for this?
3. Currently, the output of the signal cannot be changed, and the signal line sequence at the input end can be arbitrarily adjusted through the signal at the front end. Is there any way to achieve normal output in this situation (the signal PCB routing is short, so signal processing can be omitted and only level conversion can be performed)?
