• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 34 subscribers
  • Views 195 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS100KR401: SMBUS Slave Mode and related questions

GerryL
Intellectual 680 points

Part Number: DS100KR401
Other Parts Discussed in Thread: DS80PCI402

Hi,

We are planning to use the DS100KR401 in SMBUS Slave Mode, and have a few questions:

  1. It looks like the SMBUS CRC/PEC byte is required by default.  Is that correct?

  2. 10G-KR Mode does not appear to be supported in the SMBUS Slave registers.  Does the MODE pin remain active?  What is the default if not?

  3. What is the function of the INPUT_EN pin, if not pulled high?

  4. The channels do not have a specific output enable function so we are hoping to use the power down bits in the “PWDN Channels” register (address 0x01) to achieve the same result.  Questions:
    (a)  Will the channel output be in a high impedance state when powered down?
    (b)  Is the channel input still terminated when powered down?
    (c)  Are channel power up/down transitions guaranteed non-disruptive to other channels?

  5. If the RESET pin is high and “Override RESET” has not been set, then will all channels be powered down?

Thanks,
GerryL

  • 0
    TI__Mastermind 43608 points

    Hi GerryL,

    Looking into this and will get back to you next week.

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Intellectual 680 points

    Hi Drew,

    Any updates on this? Slight smile

    FYI, the planned use of the part is that IN_A and OUT_B will be connected to the SerDes pins of a DRA821U4, while OUT_A and IN_B will be connected to SFP+ modules.  Any additional comments and/or recommendations that you have for such a setup would be most appreciated.

    Thanks,
    GerryL

  • 0 in reply to GerryL
    Intellectual 680 points

    Can anyone help out here?

    Question 2 of the original post is the most critical to us -- i.e. control of 10G vs 10G-KR "MODE" when using the SMBus interface.

    Page 9 of the datasheet states that "Upon assertion of ENSMB the MODE, EQx and DEMx functions revert to register control immediately", but I cannot find any reference to the MODE setting in the register listing.

    In the EEPROM Register Map (Table 5) there is a "chX_Sel_mode" bit for each channel, but the apparently corresponding bit in the SMBus register set indicates "Set bit to 0" (for channel 0, bit 6 in register 0x10, by my reckoning).

    We just want to run in 10G mode, without 10G-KR link training.

    Thanks,
    GerryL

  • 0 in reply to GerryL
    TI__Mastermind 43608 points

    Hi GerryL,

    Apologies for the delay.

    > It looks like the SMBUS CRC/PEC byte is required by default.  Is that correct?

    I'm not sure that this is the case.  I actually have not heard of CRC/PEC byte being used on any of our Signal Conditioning devices despite many of them supporting SMBus.

    Are you getting this impression because of register 0x06?

    > 10G-KR Mode does not appear to be supported in the SMBUS Slave registers.  Does the MODE pin remain active?  What is the default if not?

    Yes, the MODE pin remains active in SMBus slave mode.  You can use the pin to configure 10G / 10G-KR mode.

    > What is the function of the INPUT_EN pin, if not pulled high?

    It is expected that this pin will be high during device operation.  With this said, the DS100KR401 is a similar device DS80PCI402.  You will see the same pin number controls RX-detect function on DS80PCI402.

    > Are channel power up/down transitions guaranteed non-disruptive to other channels?

    Yes, each channel is independent.

    Regarding input/output impedance when powered down, I'll look into this.

    > If the RESET pin is high and “Override RESET” has not been set, then will all channels be powered down?

    I'll look into this as well.

    Thanks,

    Drew