• State TI Thinks Resolved
  • Replies 8 replies
  • Answers 1 answer
  • Subscribers 34 subscribers
  • Views 128 views
  • Users 0 members are here
Support feedback
Options
Options
Related

TCAN1145-Q1: TCAN1145 interrupt and wake

Scarlett Cao
Expert 4170 points
Part Number: TCAN1145-Q1


Hi team,

 

Could you help on below questions from TCAN1145 wakeup?

  1. Since the interrupt events will impact state transition, for example UCIO, UVCC, TSD etc. If don’t want this states impact state machine transition, could they just disable them in ENABLE register? or this only impact nINT behavior but doenst input state transition

  1. What is the recommended configuration for INT ENABLE? The requirement is MCU use SPI to control TCAN1145 enter normal and sleep mode, and related selective wakeup. Which registers in INT_ENABLE1,2,3 need to be configured?
  2. Before entering sleep mode, should customer W1C all INT1,2,3?
  3. Is there any way to disable local wake up?

Thanks

Scarlett

  • 0
    TI__Genius 16382 points

    Hi Scarlett,

    1. Yes, those registers will actually disable the function. TSDW_ENABLE only disables the warning.  Edit: These UVCC, UVIO, TSD functions cannot be disabled. Only the interrupt function can be disabled to the nINT pin. Regardless of the INT_ENABLE registers, these conditions will still affect the mode transitions. 

    2. Enable registers are turned on by default, these don't need to be configured. These are only needed if they don't want them to report to the nINT pin. 

    3. Yes, we recommend clearing interrupts before entering Sleep mode.

    4. Not from a software configuration. LWU must be "disabled" by connecting this pin to GND or VSUP.  

    Best,

    Ethan

  • 0 in reply to Ethan Sempsrott
    TI__Expert 4170 points

    Hi Ethan,

    Seems 1 and 2 are conflicted

     1 you say these registers from INT_ENABLE_X will disable the functions, which mean they are not causing state machine transition.  But on point2 you say it interrupt only impact mapping to nINT. So which one is correct?

    Thanks

    Scarlett

  • 0 in reply to Scarlett Cao
    TI__Genius 16382 points

    Hi Scarlett,

    Apologies for the confusion.

    Ethan Sempsrott said:
    These are only needed if they don't want them to report to the nINT pin. 

    This statement only applies to interrupt enable registers like the ones highlighted below:

    So for example, the CAN bus wake up function cannot be disabled, but the interrupt for it can be. Whereas the Local wake up function can be disabled.

    For INT_ENABLE_x registers, these can be left at their default values. All of functions and interrupt reporting, except selective wake, are enabled by default.

    Best,

    Ethan

  • 0 in reply to Ethan Sempsrott
    TI__Expert 4170 points

    Hi Ethan,

    To confirm, for the UVCC enable in INT2, if customer disable it, the UVCC event will not cause any mode transition to failsafe or sleep right？

    Thanks

    Scarlett

  • 0 in reply to Scarlett Cao
    TI__Genius 16382 points

    Hi Scarlett,

    Yes, I believe so. I am double checking with Sean just to make sure.

    -Ethan

  • 0 in reply to Ethan Sempsrott
    TI__Genius 16382 points

    Scarlett,

    It looks like I misunderstood so I apologize for that. Sean confirmed that disabling UVCC_ENABLE only disables the interrupt to nINT pin. The function is still active and will still cause mode transitions.

    Best,

    Ethan

  • 0 in reply to Ethan Sempsrott
    TI__Expert 4170 points

    Hi Ethan

    If that's the case, could you make the summary again on which bits disable interrupt only and which bits disable the function? Let's make it very clear. Thanks

    Scarlett

  • 0 in reply to Scarlett Cao
    TI__Mastermind 30500 points

    Hi Scarlett,

    The INT_ENABLE_X registers only disable the interrupt indication on nINT pin. There is no method to fully disable the interrupts functions. You will still see the UVCC interrupt set in INT_2 register in a UVCC condition even if INT_ENABLE is disabled. 

    All your listed fault conditions existing long enough will force a mode transition which cannot be disabled. i.e a UVCC event > tUVSLP will force the transceiver to enter sleep mode (or enter fail-safe mode if FSM enabled).

    Regards,

    Sean