DS125DF1610: ds125df1610 Layout Guidelines

Part Number: DS125DF1610


Hi TI team

 

Regarding the layout guidelines for ds125df1610, we only found recommendations stating that the high-speed inputs and outputs should use 100-ohm impedance control, along with the routing guidelines.

Currently, the clock pins are also designed with 100-ohm impedance control. For the non–high-speed input/output pins, we are using 50-ohm impedance-controlled traces.

We would like to ask whether there are any recommended rules for these I/O pins. Below is our current high-speed routing layout. Could you please help to review it and advise if there are any suggested adjustments?

 

image.png

 

thanks

JL

  • Hi JL, 

    I apologize for the delayed response. 

    The high speed differential pair looks good. 

    There are no particular recommendations for non-high speed data lanes. 50 ohm impedance controlled traces are good. 

    Best,
    J