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TUSB7320: TUSB7320  Request EEPROM register map / image (Rev. Q datasheet has only PCI config table)

Part Number: TUSB7320
Other Parts Discussed in Thread: USB2ANY

Dear TI Support Team,

I am using the TUSB7320 USB 3.0 xHCI host controller with the optional external I2C EEPROM (24xxseries) to customize Vendor ID / Device ID and port configuration.

In the current datasheet SLLSE76Q (Rev. Q, March 2024), Section 8 “Register Maps” only contains Table 8.1. PCI Configuration Register Map, which describes the PCI configuration space at offsets 000h0FCh.

The older E2E answers and documentation refer to an “EEPROM register map (Table 3.1)” in the datasheet, but this table does not appear anywhere in Rev. Q, and there is no description of the EEPROM byte layout (offsets for Vendor ID, Device ID, descriptors, port config, etc.).

1.Could you please provide:The complete EEPROM register map for TUSB7320/TUSB73x0 (byte offsets and field definitions), or An older datasheet revision or application note where this EEPROM map is documented, 
2.or A reference EEPROM image and description of which bytes correspond to Vendor ID, Device ID, and any other configurable options.I plan to program the EEPROM externally over I2C using a USB2ANY style programmer, so I only need the correct format and field map; the protocol itself is already clear from section 6.4.1 (TwoWire SerialBus Interface).
3.Without this EEPROM map, it is not possible to safely generate the correct contents for the external EEPROM on TUSB7320.

Thank you for your support.

  • Here is the default setting.

    00	00	TUSB7340 Functional Indicator
    01	19	Number of Bytes
    02	00	PCI D0h, Subsystem Vendor ID, Byte 0
    03	00	PCI D1h, Subsystem Vendor ID, Byte 1
    04	00	PCI D2h, Subsystem ID, Byte 0
    05	00	PCI D3h, Subsystem ID, Byte 1
    06	AB	PCI D4h, General Control 0, Byte 0
    07	0D	PCI D5h, General Control 0, Byte 1
    08	1B	PCI D8h, General Control 1, Byte 0
    09	3F	PCI DCh, General Control 2, Byte 0
    0A	00	PCI E0h, USB Control, Byte 0
    0B	00	PCI E1h, USB Control, Byte 1
    0C	00	PCI E2h, USB Control, Byte 2
    0D	00	PCI E3h, USB Control, Byte 3
    0E	00	PCI E4h, De-emphasis and Swing Control, Byte 0
    0F	00	PCI E5h, De-emphasis and Swing Control, Byte 1
    10	00	PCI E6h, De-emphasis and Swing Control, Byte 2
    11	00	PCI E7h, De-emphasis and Swing Control, Byte 3
    12	00	PCI E8h, Equalizer Control, Byte 0
    13	00	PCI E9h, Equalizer Control, Byte 1
    14	00	PCI EAh, Equalizer Control, Byte 2
    15	00	PCI EBh, Equalizer Control, Byte 3
    16	00	PCI ECh, Custom PHY Transmit/Receive Control, Byte 0
    17	00	PCI EDh, Custom PHY Transmit/Receive Control, Byte 1
    18	00	PCI EEh, Custom PHY Transmit/Receive Control, Byte 2
    19	00	PCI EFh, Custom PHY Transmit/Receive Control, Byte 3
    1A	20	PCI 61h, Frame Length Adjustment Register
    1B	80	End of List Indicator (80h)
    1C	FF	NOT USED
    1D	FF	NOT USED
    1E	FF	NOT USED
    1F	FF	NOT USED
    
    

    Regards

    brian