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SN65DSI83: I2C crashes after a while

Jens Weber
Prodigy 40 points
Part Number: SN65DSI83


Hello all,

in our custom design we use the SN65DSI83 to configure a custom display. In general everything works: stable image and so on. But on all prototypes (3) we have the issue that I2C stopps working after a while and the only way to get it back is to power cycle the SN65DSI83. We double and triple checked if the hardware design is correct and the parameters of IC and display are in range (which they are) and we didn't find anything what the problem could be. We also checked the forum if anybody has the same issue, but when someone has the issue solved nobody mentioned it afterwards or the solution is something which we have already considered in our design. 


We checked hardware and timing and everything looks how it has to look, but I2C continues crashing after several minutes.  We also have changed from DSI_CLK to REF_CLK. Our current schematic from DSI-Bridge attached. Is there anything you know what the problem could be because we are running out of ideas. 

DSI_BRIDGE.png

  • 0
    TI__Mastermind 25660 points

    Hi Jens,

    Does I2C work as expected at the start? Are there other devices also on the same I2C bus that could be holding the bus?

    Could you tell us what the I2C error is? Are the transactions not acknowledged?

    Please also check whether the power-up and initialization sequence is followed. These are shared in details in the datasheet. Is video transmission on the device working as expected?

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    Prodigy 40 points

    Hey Ikram, 

    thank you for your response. Yes I2C works as expected at the start and we are able to read the register, other devices on the same I2C bus are there but not holding the bus, because we have removed them and error still occur. The I2C error is that when I2C error is there we got no more acknowledge, see attached image. This shows data before and behinde level shifter (this is the error state) -> in our opinion there is no critical delay induced by the level shifter.

     

    We have checked that the power-up and initialization sequence is followed step by step which they are and we also tried to expand the waiting times.
    We used a linux driver which is highly proved with this IC. (GitHub path: drivers/gpu/drm/bridge/ti-sn65dsi83.c)

    Best regards,
    Jens

  • 0 in reply to Jens Weber
    Prodigy 40 points

    and yes. video transmission works as expected as long as the error not occur.

  • 0 in reply to Jens Weber
    TI__Mastermind 25660 points

    Hi Jens,

    What rate is the I2C run here? Is there any issue with capacitance or the I2C rise/fall times not being within working range?

    Could you capture logic analyzer waveforms to compare the working and not working I2C transactions? Is the issue that the device does not ACK?

    Could you also please check the address and registers for these operations and see if it matches the datasheet.

    Best regards,
    Ikram