Hi Team,
Posting on behalf of our customer.
We are using the NXP S32G2 CPU PFE EMAC which requires a PHY that guarantees octet-only alignment. Does the DP83848-EP support octet aligned packets in both MII/RMII modes?
Regards,
Danilo
Hi Team,
Posting on behalf of our customer.
We are using the NXP S32G2 CPU PFE EMAC which requires a PHY that guarantees octet-only alignment. Does the DP83848-EP support octet aligned packets in both MII/RMII modes?
Regards,
Danilo
Hello,
Thank you for your query. An apps engineer will be responding to you shortly.
Sincerely,
Gerome
Hi Danilo,
Our newer device (DP83826A) uses preamble bits but our understanding is that those bits are padded so it should be octet aligned. For Dp83848, the documentation is not as good so I cannot be entirely sure if this will be octet-aligned. In 10M case, however, the datasheet says smart squelch feature uses 3 bits of preamble of the packet so I do not think DP83848 will be fully octet aligned.
Best,
J