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DS90UH984-Q1: BCC_WDOG_TIME 983-984

Roy Chou1
Genius 17760 points

Part Number: DS90UH984-Q1

Hi Team,

 

Our architecture is 983+984 operating in FPD4 mode. (single lane)

We would like to set BCC_WDOG time to let if unexpected event occur, the CLK stuck time could be shorter and my questions are showing as below. Out target is 24ms.

  1. Should we set 983 main page 0x29 register or 984 main page 0x29 register?
  2. Can we manually produce the fault to confirm if the BCC_WDOG time works?
  3. May you share the side effect if we shorter the BCC_WDOG time?

image.png

 

Regards,

Roy