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AM623: AM623x OSPI interface – Requirement for 1-1-1 vs direct octal (8-8-8) device bring-up

Shaik Mahaboob Nazeer
Prodigy 20 points

Part Number: AM623

Hello TI Support Team,

We are using an AM623x device and connecting an FPGA on the OSPI interface.
The FPGA will emulate a SPI-NOR-compatible memory so that it can be enumerated by Linux and exposed through the MTD layer.

We understand that standard NOR flashes:

  • Power up in legacy 1-1-1 mode

  • Respond to RDID (0x9F), SFDP (0x5A)

  • Advertise octal capability in SFDP

  • Switch into 8-8-8 or 8D-8D-8D only after configuration

However, for our application we would prefer to:

  • Avoid implementing 1-1-1 support in FPGA, and

  • Have the FPGA power up directly in octal mode (8-8-8),

  • With Linux performing all transactions in octal mode from the very first access.

We would like your guidance on the following:

1. Linux kernel probe behavior

Does the upstream SPI-NOR + Cadence OSPI driver on AM62x:

  • Require legacy 1-1-1 mode to issue 0x9F/0x5A,

  • Or can we configure it (e.g. via DTS or driver settings) to:

    • Skip JEDEC ID and SFDP probing,

    • Initialize the controller directly in octal mode,

    • And read memory using a predefined opcode?

2. Cadence OSPI controller capabilities

Can the Cadence OSPI hardware on AM623x:

  • Be configured directly in 8-8-8 mode without first performing any single-bit transactions?

  • Or is there a hardware requirement to start in legacy mode?

Can you please suggest what is the recommanded approach.

  • 0
    TI__Guru* 78960 points

    In the Linux Cadence OSPI (also referred to as cadence-quadspi) driver, reading the device ID with command 0x9F (JEDEC ID) typically occurs in legacy 1-1-1 mode during the initial probing phase.
    - Probing Sequence: When the driver first starts (probes), it must identify the flash chip. It defaults to the 1-1-1 mode (1-bit command, 1-bit address, 1-bit data) to ensure compatibility with all SPI/NOR flash devices.
    - STIG Mode: The driver utilizes the Software Triggered Instruction Generator (STIG) mode to issue this specific 0x9F command. This mode allows the controller to send low-level instructions (like Read ID) before the high-speed Octal or Quad modes are negotiated and enabled.
    - Transition to 8-bit (Octal) Mode: If the flash device and the controller both support Octal mode (8-bit), the driver will only switch to this mode after successfully reading the ID and verifying the device's capabilities via the Serial Flash Discoverable Parameters (SFDP).
    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 20 points

    Hi Hong ,

    Thanks for your response.

    While we want to emulate a NOR flash in FPGA , we were exploring about the SRD and DDR modes as well. Can we emulate a NOR flash via OSPI in a SDR mode.

    I came across a statement from the attached link below

    software-dl.ti.com/.../UG-QSPI.html

    OSPI controllers supports PHY Calibration in DQS + Double Data Rate (DDR) mode for OSPI/QSPI NOR flashes in Octal configuration wherein data can be read on both edges of the clock, and non-DQS + Single Data Rate (SDR) mode for OSPI/QSPI NAND flashes in Quad and Octal configuration.

    if that is the case can you suggest any NAND flash part numbers that has been tested over OSPI, which we could emulate a FPGA over OSPI in SDR mode. 

  • 0 in reply to Shaik Mahaboob Nazeer
    Prodigy 20 points

    Hi Hong,

    Any inputs or feedback on the above question on SDR and DDR mode..?

  • 0 in reply to Shaik Mahaboob Nazeer
    TI__Guru* 78960 points

    Yes, you can access FPGAs via the Linux Cadence OSPI driver in SDR and DDR modes.

    The OSPI driver itself supports both SDR (Single Data Rate) and DDR (Double Data Rate) protocols,  but successful DDR operation depends on the underlying hardware, bootloader setup, and correct device tree configuration (like spi-max-frequency) to meet timing requirements.

    Best,
    -Hong