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SN55LVDS31: LVDS splitter

AG
Intellectual 405 points

Part Number: SN55LVDS31
Other Parts Discussed in Thread: SN65LVCP22, SN65LVDS250

Hi,

I have an processor interface, where i get direct LVDS interface for connecting LCD, which works fine with LCD

LVDS_CLK_P
LVDS_CLK_N
LVDS_D0_P
LVDS_D0_N
LVDS_D1_P
LVDS_D1_N
LVDS_D2_P
LVDS_D2_N
LVDS_D3_P
LVDS_D3_N

Now , i would like to create a parllel display on same interface, does the driver IC SN55LVDS31 meet the requirement?

how to make connection in that case?

will it support 1024 * 768 XGA mode, OR 1280 * 800 OR 1366 x 768 (HD) resolution?

  • 0
    TI__Genius 12696 points

    Hi AG,

    Just to make sure I understand your use case correctly, the source processor outputs a video signal via LVDS, and the LCD has a processor/MCU that accepts LVDS as an input, and you want to display that same data onto a 2nd display. Is that correct? If so, what is the max frequency of the LVDS signals the source processor outputs? What type of signal does the 2nd display take as an input? 

    Regards,

    Matt 

  • 0 in reply to Matt Smith
    Intellectual 405 points

    Hi Matt,

    Thanks for reply,

    1 st LCD having LVDS input

    2 nd LCD can have LVDS input or same can be transferred to HDMI as output, using LVDS to HDMI converter

    process having below spec for LVDS channel

    Single 4-lane supports 720p60, up to 1366×768p60 or 1280×800p60

    Regards,

  • 0 in reply to AG
    TI__Guru 61717 points

    Hi AG,

    Today is a public holiday. Please help give some time for some feedback, thanks.

    Best Regards,

    Michael.

  • 0 in reply to AG
    TI__Genius 12696 points

    Hi AG,

    Can you please share a schematic/block diagram of what you are trying to do and label each IC in the LVDS signal chain? I'm not sure how SN55LVDS31 would fit into this system you are describing. All this device does in convert single-ended signals into differential LVDS signals up to 400Mbps. 

    Regards,

    Matt

  • 0 in reply to Matt Smith
    Intellectual 405 points

    Hi matt,

    Thanks for reply

    basically i have only one LVDS interface on processor and drive two displays (parallel, same data)

    please refer the block diagram in attachment,& let me know how it can be acheived using TI chips

  • 0 in reply to AG
    TI__Genius 12696 points

    Can you share the max data rate the LVDS output of the processor can get up to for a single LVDS pair? 

  • 0 in reply to Matt Smith
    Intellectual 405 points

    Hi Matt, please find details, as below

  • 0 in reply to AG
    TI__Genius 12696 points

    Hi AG,

    Judging by the block diagram you sent, it doesn't look like you need an LVDS driver like SN55LVDS31 that converts single-ended signals to LVDS since the processor is already outputting LVDS. You just need a buffer to redrive the LVDS signals to the 2nd display. What I would recommend is using a crosspoint switch like SN65LVCP22 that can be configured to take a single LVDS input and redrive it across 2 outputs (see below). You will need 5 devices, each taking one of the LVDS streams from the processor as an input. OUT0 can go to LCD1 and OUT1 can go to LCD2. SN65LVCP22 supports up to 1Gbps data rates, so this should work with your application.

    Regards,

    Matt 

  • 0 in reply to Matt Smith
    Intellectual 405 points

    Hi Matt,

    Thanks for reply

    Is their any single chip solution for same?

  • 0 in reply to AG
    TI__Genius 12696 points

    Hi AG,

    That would require a 10-channel crosspoint switch, which we do not have. We do have 4-channel versions like SN65LVDS250 which will reduce your device count from 5 to 3 since it would be able to take 2 inputs at a time. 

    Regards,

    Matt

  • 0 in reply to Matt Smith
    Intellectual 405 points

    Hi matt,

    Thanks for reply,

    1. Can you suggest similar type of soution in case we decide to split RGB signals rather than LVDS

    24-bit parallel RGB up to 1366x768p60 or 1280x800p60.

    2. Can you suggest similar type of soution in case we decide to split MIPI DSI signals rather than LVDS

    • Supports a 4-channel MIPI DSI display with pixels from the LCDIF;
    • Compatible with MIPI DSI Specification v1.2 and MIPI D-PHY
    Specification v1.2;
    • Supports resolutions such as 1080p60 or 1920x1200p60;
    • Maximum data rate of 1.5 Gbps per lane.

  • 0 in reply to AG
    TI__Mastermind 22961 points

    Hi AG, 

    There is no splitter solution for RGB and MIPI D-PHY. 

    Best,
    J

  • 0 in reply to J
    Intellectual 405 points

    Hi j,

    Thanks for reply,

    bot exactly as signal splitter, but any other way, by which we can meet the purpose

  • 0 in reply to AG
    TI__Expert 5340 points

    Hi,

    Something like TS3DV642-Q1 works with MIPI D-PHY at data rates up to 6Gbps but maybe not for the resolution requirements and splitter implementation.

    Thank you,
    Arya