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DS250DF810: No output waveforms on TX ports while inputting the data in RX ports

Shunsuke Yamamoto
Genius 9711 points

Part Number: DS250DF810

Hi team,

My customer designed the circuit with DS250DF810 which is used for the 25G communication between FPGA and ethernet PHY. My customer is able to confirm the CDR lock on the input side(RX0N, RX0P, ~ RX7N and RX7P), but My customer cannot observe the output waveform on the output side(TX0N, TX0P, ~ TX7N and TX7P). My customer would like to confirm what happens in DS250DF810.

  1. Are there any registers which show the current situation in DS250DF810?
  2. Are there any registers which my customer should configure to fix this issue?

image.png

image.png

Best regards,

Shunsuke Yamamoto

  • 0
    TI__Mastermind 41663 points

    Hi Yamamoto-san,

    This looks like an appropriate basic configuration.  Some more advanced configuration details can be found in the programming guide for this device, SNLU182.  This is located in a secure resources folder:

    https://www.ti.com/drr/opn/DS250DF810-DESIGN

    A few questions:

    • How is customer measuring signal at TX?
    • Which register is the customer using to determine CDR lock?  Could they check and share value for register 0x02.  This will have more details on CDR status.
    • If customer performs channel register reset, ch_reg_0x00 = 0x04, after "Select broadcast write mode", does this impact observations?

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    TI__Genius 9711 points

    Hi Drew-san,

    Thank you for the support and sending me the application note.

    Should I send the application note to my customer? I don't know if this material is beneficial or not..

    I have received the answers of your questions. Please kindly check it!

    Drew Miller1 said:
    How is customer measuring signal at TX?

    My customer has measured the TX signals by the differential probes and the oscilloscope which is DSA-X 93204 from Keysight. TX measurement is same with RX measurement.

    Drew Miller1 said:
    Which register is the customer using to determine CDR lock?  Could they check and share value for register 0x02.  This will have more details on CDR status.

    My customer has checked the address 0x78, and found out all lanes of 0x78 are 0x20 or 0x30.

    My customer will investigate the rest of the questions.

    Best regards,

    Shunsuke Yamamoto

  • 0 in reply to Shunsuke Yamamoto
    TI__Genius 9711 points

    Hi Drew-san,

    My customer doesn't know how to execute "Select broadcast write mode". Could you please kindly advise me hot to do it?

    Best regards,

    Shunsuke Yamamoto

  • 0 in reply to Shunsuke Yamamoto
    TI__Mastermind 41663 points

    Hi Yamamoto-san,

    Shunsuke Yamamoto said:
    Should I send the application note to my customer? I don't know if this material is beneficial or not..

    Please ensure the customer has access to this.

    Shunsuke Yamamoto said:
    My customer has measured the TX signals by the differential probes and the oscilloscope which is DSA-X 93204 from Keysight. TX measurement is same with RX measurement.

    Understood, thanks.

    Shunsuke Yamamoto said:
    My customer has checked the address 0x78, and found out all lanes of 0x78 are 0x20 or 0x30.

    Is the customer measuring output on channels with CDR lock?  Does the customer expect some channels not to have CDR lock?  0x20 indicates no CDR lock.

    Shunsuke Yamamoto said:
    My customer doesn't know how to execute "Select broadcast write mode". Could you please kindly advise me hot to do it?

    I'm confused on this point, can you help clarify where they are stuck?  They need to write to register 0xFF and set 0x03.

    Customer appeared to already be doing this based on configuration shared in original post.

    image.png

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    TI__Genius 9711 points

    Hi Drew-san,

    Drew Miller1 said:
    My customer has checked the address 0x78, and found out all lanes of 0x78 are 0x20 or 0x30.

    Is the customer measuring output on channels with CDR lock?  Does the customer expect some channels not to have CDR lock?  0x20 indicates no CDR lock.

    What does 0x30 mean? I will also confirm if CDR is locked or not again.

    Drew Miller1 said:
    Which register is the customer using to determine CDR lock?  Could they check and share value for register 0x02.  This will have more details on CDR status.

    My customer has checked the address 0x02, and the value of 0x02 is 0xd8.

    Best regards,

    Shunsuke Yamamoto

  • 0 in reply to Shunsuke Yamamoto
    TI__Genius 9711 points

    Hi team,

    This is just a kind reminder. Please kindly let me know the update.

    Best regards,

    Shunsuke Yamamoto

  • 0 in reply to Shunsuke Yamamoto
    TI__Mastermind 41663 points

    Hi Yamamoto-san,

    Shunsuke Yamamoto said:
    What does 0x30 mean? I will also confirm if CDR is locked or not again.

    0x30 indicates CDR lock.

    Shunsuke Yamamoto said:
    My customer has checked the address 0x02, and the value of 0x02 is 0xd8.

    This also indicates CDR lock.

    Was customer able to figure out the configuration sequence including channel reset?  Did this have any impact?

    In general, DS250DF810 will by default lock to 25G signal and will transmit signal once it has CDR lock.  If device has CDR lock, customer should be able to observe an output unless some additional configuration has been applied.

    Thanks,

    Drew

  • +1 in reply to Drew Miller1
    TI__Genius 9711 points

    Hi Drew-san,

    Thank you for the reply. It is good to know that output waveforms can be seen if CDR is locked. I will ask my customer to double check if the output wavefoms aren't seen really.

    By the way, should I ask my customer to provide the all register setting of DS250DF810 and the schematic of DS250DF810?

    Best regards,

    Shunsuke Yamamoto