DS90CR287: How spec change when RXCLK_IN = 50MHz

Hi Hayashi,

The specifications share these values for 85 MHz only in the datasheet. For lower rates we would recommend limiting the skew as much as possible, although the RSKM would be greater.

Are the customer asking for estimates or are there any concerns about the input skew margin in the customer's system? 

Best regards,
Ikram

Hi Ikram,

Customer wants to estimate and is concerned about the margin.

Customer' customer (let's call end customer) uses my customer's system and cables of other supplier. Customer faces some issues on the cables degradation . Most of cases, my customer suggests the end customer just to replace the cables. But the end customer ask my customer to investigate how much degradation is accepted. So the question of RSPos and RSKM with 50MHz is asked.

Can you please help to give a guidance with theoritically?

Regards,

Hayashi

Hi Hayashi, 

I understand the question better now. I will look internally if we have similar guidance for this and get back to you by tomorrow.

Best regards,
Ikram

Hi Hayashi,

RE: DS90CR288A: Receiver Switching Characteristics 

According to this E2E, the RSKM recommended would be the same at 50 MHz. The datasheet mentions 290 ps RSKM at 85 MHz, and this should be applied at 50 MHz and lower frequencies as well.

Best regards,
Ikram

Hi Ikram,

Interesting because the E2E post are posted by a FAE who supports same customer as myself. They had a same question in 7 years ago.

By the way, I read the apps note, but I can't figure out why they are same in 85MHz and 50MHz.

I understand how to calcurate the table 3, which is same as equation (1),(2),(3). I'm not sure how to determine Tppos_n and Rppos_n in 50MHz. For example, Tppos0 is typically 0 because of the start point, and has +/- 20ns error in maximum. Similarly, Tppos1 is typically 1.68ns, and has +/- 20ns error in maximum.

I don't know where the +/-20ns comes. Can you please explain where the +/- 20ms comes? In addition, let me double check that 1.68ns on each bit are comes from 297.5Mbps (->3.36ns) which is a spec of DS90CR287, is it correct?

Best regards,

Hayashi

Hi Hideki,

Hideki Hayashi1 said:

I don't know where the +/-20ns comes. Can you please explain where the +/- 20ms comes? In addition, let me double check that 1.68ns on each bit are comes from 297.5Mbps (->3.36ns) which is a spec of DS90CR287, is it correct?

This is correct, at 85 MHz clock rate, the data lanes are running at 7x (85MHz). 

85 MHz * 7 = 595 MHz
And at 595 MHz frequency, the bit period is 1.68 ns. 

Hideki Hayashi1 said:

I understand how to calcurate the table 3, which is same as equation (1),(2),(3). I'm not sure how to determine Tppos_n and Rppos_n in 50MHz. For example, Tppos0 is typically 0 because of the start point, and has +/- 20ns error in maximum. Similarly, Tppos1 is typically 1.68ns, and has +/- 20ns error in maximum.

You are right, the strobe positions cannot be calculated from here, it can only be estimates. The datasheet only shared the 85 MHz values. The other E2E was suggesting to use the RSKM values to be the same since it works with the higher 85MHz frequency, and would also work for lower frequencies.

To characterize the cable degradation, it may be simpler to measure the jitter here; comparing newer cables to aged cables. I will discuss with the team and get back to you by tomorrow.

Best regards,
Ikram

Hi Hayashi,

Is there any specifications such as jitter measurements that the customer are using to verify the issue is with the cable? 

And this is an LVDS cable for all the LVDS clock and data lanes being transmitted from transmitter to receiver in this setup? The cable skew should be kept below 140 ps as mentioned in the datasheet. The system should aim to meet this spec at 50 MHz as well.



Best regards,
Ikram

Hi Ikram,

I don't know any spec to verify the issue is with the cable, let me check. I know the values written in datasheet. But customer wants to know the actual performance at 50MHz, which shouldn't be guranteed and used as reference.

I investigate the calcuration and found some parameter might differ at 50MHz.

All values of Tppos_N can be discribed as Tppos_N = 1.68ns * N +/-20ns, where 1.68ns comes from 85MHz * 7 = 595MHz.

Similary, Rspos_N = 0.84ns + 1.68ns * N +/- 0.35ns.

To calculate RSKM, below is given by using (1),(2),(3)

Left Bit Margin = Rspos_N_min - Tppos_N_max = (0.84ns - 0.35ns) – (0ns + 0.2ns) = 0.290ns

Right Bit Margin = Tppos_N+1_min- Rspos_N_max = (0ns + 1.68ns - 0.2ns) -  (0.84ns + 0.35ns) = 0.290ns

because terms with N as a coefficient cancel each other out.

So there are still three terms which might change at 50MHz. Can you please check how to change at 50MHz in theory? Customer would like to know the ideas, not a exact value.

0.84ns is a value of typical transmit time.

0.2ns is a Tppos_N max error.

0.35ns is a Rppos_N max error.

Best regards,

Hayashi