DS90LV032AQML-SP: defination of EN and EN_n

ajay kumar dangi

As per datasheet page number 2 truth table if EN is low abd EN_n is High IC is desabled and output are tristate, this means when EN is high or EN_n is low other complementry signal is ignored. the development board sch "www.ti.com/.../snlu195.pdf " Page no 7 , in order to enable the IC J4 and J6 pin 3 and Pin 4 are shoted as per table 1, page 3.

This means inside the IC EN and Not of EN_N are ANDed and not ORed. Please confirm the same.

8 months ago

0 Ethan Sempsrott 8 months ago

TI__Mastermind 29802 points

Hi Ajay,

Thanks for reaching out. Our LVDS expert is out of office today, but he returns tomorrow. Thanks for your patience.

-Ethan

0 Matt Smith 8 months ago

TI__Genius 17776 points

Hi Ajay,

The EN and EN_N pin are ORd together in the device, so the datasheet is correct. In the EVM, the EN and EN_N pin are weakly pulled up to Vcc if no jumper is installed. If you no jumpers are connected, the device will still be enabled. Tying EN_N to GND via a shunt is not a requirement, but a suggestion in case the pullup resistor is desoldered.

Regards,

Matt

0 ajay kumar dangi 8 months ago in reply to Matt Smith

Prodigy 170 points

Hi Matt,

Thanks a lot for confirming that EN and EN_n is ORed inside. In my application I have only one signal to controll the device and most of the time i have to keep it desabled, I will be connecting EN_n pin to pullup to disbable it and controlling the IC using EN pin.

+1 Matt Smith 8 months ago in reply to ajay kumar dangi

TI__Genius 17776 points

Yes that will work.

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DS90LV032AQML-SP: defination of EN and EN_n