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DP83822IF: RX_CLK available in RMII mode?

Part Number: DP83822IF
Other Parts Discussed in Thread: DP83822EVM

Hello TI,

snls505g Table 6-1 says that RX_CLK is unused for RMII:

image.png

Please confirm that it is possible to output the Recovered CDR clock on the RX_CLK pin in RMII Master mode (25 MHz @ 100 Mbps ?).

Which register bits would have to be configured to output the (100 Mbps) Recovered clock on the RX_CLK pin in RMII Master mode, please?

  • Hi Bernhard,

    I do not believe the RX_CLK pin can output a 25MHz recovered clock in RMII master mode. RMII uses a 50MHz clock due to the reduced pin count, so this would be more applicable to an MII or RGMII operational mode.

    Out of curiosity, is there a reason you would need a 25MHz recovered clock in RMII mode?

    Best,

    Shane

  • Hello Shane,

    My formulation of the question was unclear. Is any Recovered (CDR) Clock available on RX_CLK in RMII mode, and, if so, what would the RX_CLK frequency be? Are any special register configurations required to enable this?

    The pin description quoted in the original post says that the RX_CLK pin is unused in RMII Mode, hence the question. Perhaps what was meant is that RX_CLK is not *required* for the RMII interface (but is nevertheless available)? Other sections in the UM indicate that RX_CLK is optionally available, so a clarification might be helpful.

  • Hi Bernhard,

    There is a register to output the 50MHz RMII clock from the RX_CLK pin. Please see 0x000A[0]:

    I tested this today on our DP83822EVM and can see a 50MHz clock from RX_CLK when this bit is set. I believe this is what the datasheet means by optionally available.

    Best,

    Shane