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TMDS1204: Schematic Review

Part Number: TMDS1204

Hi Team 

I need your help for schematic review on the TMDS1204 and its connectivity. 

The TMDS1204 operates in Sink mode where it drives HDMI data from PC to FPGA

The TMDS1204 works in pin strap mode

HDMI_IN.pdf 

Description of interface IOs

MAIN_SCL/MAIN_SDA - optional I2C configuration mode. FPGA is master on the I2C

MAIN_HDMI_IN_EN - Enable for the TMDS1204

MAIN_HDMI_IN_SIGDET_OUT - indication from TMDS1204 for vakid signal

MAIN_HDMI_IN_SRC_DETECT - Indication that HOST is connected. Indication is transmitted to FPGA

MAIN_HDMI_IN_SCL, MAIN_HDMI_IN_SDA - I2C to FPGA that implements the EDID protcol

MAIN_HDMI_IN_HPD - FPGA indication to Host that it is ready for EDID communication

 

Thanks

Roey

 

  • Hi Roey, 

    The schematic looks good overall but I have one comment:
    AC_EN pin is enabled but this is only enabled when the receiver receives AC-coupled signal. Since this is on the sink side, it does not receive AC-coupled signal so AC_EN needs to be low. 
    Also, what are the ESD requirements for this board?

    Best,
    J

  • Hi J

    thanks for the reply

    the AC coupling is related to the FPGA connection at the sink side

    The FPGA recieves the HDMI to its serdes inputs. The serdes requires AC coupled signal

    do you think there is a problem here?

    About the ESD there is no requirement for protection. I thought it would be good to have one

    regards

    roey

  • Hi Roey, 

    Sounds good on the ESD requirements and as long as AC_EN pin is high there should be no issue having AC-coupled input on the FPGA side. 

    Best,
    J