Part Number: TLK2501
We're working with a design using a TLK2501 and find it frequently gets in a state where it receives incorrect data. The transmitter has TX_EN high and TX_ER low, and the receiver has RX_DV high and RX_ER low, but the ouput at the rx often does not match the input at the tx. The RX_CLK looks valid and can be seen to match the tx's clk (but not identical to the GTX_CLK at the receiver of course). Oscillators for GTX_CLK at both ends should be within their 50ppm spec.
The incorrect data is sometimes a simple stuck high or low, but can also be that a signal comes out on the 'next' pin (so TX4 might come out on RX5) and be inverted (! scoping them shows they're exactly inverted - not just shifted).
Forcing a resync by cycling enable at either end, or interrupting the line, rolls the dice again. Toggling TX_EN does not. The link might sometimes resolve itself after a few seconds but most of the time it is locked into the fault state and doesn't automatically recover.
We do know that our clock is slightly out of spec (has typical jitter of 50ps, where the TLK2501 requires max 40ps) and a correct part is on the way, but this is still very strange behaviour - would this explain it alone? Or is there something else likely? I'd have thought that regardless of clock issues it would fail decoding and control code checks and not happily stream incorrect data.