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DP83822I: SFD function

Part Number: DP83822I

I have a question about the SFD feature.
In section 8.3.3 of the datasheet, the SFD functions are: LED_0, LED_1 (GPIO1), COL (GPIO2), RX_D3 (GPIO3) Int/PWDN_N and CRS pins.
In the datasheet discribed,
' The IEEE 1588 PTP pin Select Register (PTPPSEL, address 0x003E) is able to route both transmit and receive indications to LED_0 (GPIO1), COL (GPIO2), CRS and INT/PWDN_N, '
Pins and markings.

 

Is LED_0 (GPIO1) a typo for LED_1 (GPIO1)?
If it's not typo, LED_0, CRS pin is set from register 0x003E. Is it correct to recognize that when assigning to GPIO pins, it is set by registers 0x0462, 0x0463?

  • In relation to the above, please tell us about the register settings that need to be changed.
    Address Setting value
    0x0017 0x0062
    0x003E 0x0035
    0x0462 0x8300
    0x0463 0x0005
    0x0467 0x0EE3
    Please let me know if need anything settings.

  • Hi Oka-san, 


    Is LED_0 (GPIO1) a typo for LED_1 (GPIO1)?

    This seems to be a typo for LED_1 (GPIO1).

    What is the intention for the register writes? Without that information, it is hard to confirm if the register settings are correct. 
    In addition, 0x467 is read-only register. 

    Best,
    J