Part Number: XIO2001
Hello,
I am designing an industrial system using the XIO2001 (SCPS212J). I need to force the Max Payload Size (MPS) to 128B strictly through the Serial EEPROM to ensure the host BIOS cannot override it to 256B or 512B.
In Table 8-36 (Offset 78h), the default MPS is 128B, but the MRRS defaults to 512B. Even with these defaults, our system's BIOS detects that the chip supports up to 512B and automatically increases the MPS setting.
Since the EEPROM Loading Map (Table 8-8) only covers up to Offset CBh, I am looking for a shadow register or diagnostic bit within the C0h-CBh range (EEPROM Offsets 0Fh-1Ah) that can overwrite the Device Capabilities Register (Offset 74h) bits [2:0].
My Goal: I want the chip to report it ONLY supports 128B, which should effectively make the MPS field in Offset 78h "Read-Only" at 128B. Please advise on which EEPROM offset and bit to modify.
Thank you.
Karen
