DP83869HM: power sequencing

Hi Shane, 

I have changed the sequence now. 

VDDA2P5 and VDD1P1 >> VDDA1P8 (1ms) >> VDDIO (0.7ms)

is this a current sequence ?

thanks, 

Visweswara 

Yes that would be correct.

Best,

Shane

what goes wrong in the power down sequence ?  if i remove 1.0V and 2.5V supplies keeping 3.3V (VDDIO) will it throw any garbage value  ? or all the voltage rails will go down by 1ms - 10ms , will it throw any garbage value on the lines ?

Hi Visweswara,

There is no required power down sequence, however once any of the three power rails go low it should prevent the PHY from transferring data. By garbage value on the lines, are you referring to the MDI, MII, or SMI(MDIO/MDC) lines?

The PHY should not throw bad values as it is powering down, however it would stop responding to the SMI bus and kill any link on the MDI.

Best,

Shane

yes i am refering to MDI, MII and SMI

Bad values should not come out of these interfaces when all rails are powered down. Without the 1V rail the SMI should stop responding and the link will drop on the MDI without the 2.5V rail. Without a link on the MDI, nothing would come out of the MII.

Best,

Shane