TUSB9261: RPI Compute Module-> TUSB9261 -> M.2 SATA SSD Schematic Review Items

Hi Yahya,

Please give us ~2 business days to perform a schematic review, and will provide feedback by ~3/4.

As for your questions:

Yahya Farag said:

1) Is it fine for VBUS to be applied to the IC before 1V1 and SATA_3V3 (5V is turned on first, then 1V1 buck, whose power good turns on a load switch for SATA 3V3, which powers both the bridge IC and the actual SSD)

As long as the 5V rail is still being divided down to an acceptable range for the USB_VBUS pin, it should be okay. The TUSB9261DEMO board is able to be powered via VBUS as well, so it should be fine.

Yahya Farag said:

2) Is the supervisor IC on the GRST sufficient to address the errata timing issue

Is the 1.1V rail being powered before or after the 3.3V rail? As long as the VDD/1.1V rail is powered before the 3.3V rail, there should not be any issues.

As for the IC, as long as the IC is keeping the TUSB9261 in reset until the 1.1V rail is stable, then taking the TUSB9261 out of reset, then it should be okay.

It looks like in this case, it should be that when 3.3V is not provided to VDD, RESET is pulled-up. That's the intended implementation, correct?

When 3.3V is powered, if 1.1V is also powered at the same time, then the implementation makes sense to me. I'm not familiar with the IC being used here however, so it may be good to submit a separate E2E for this device and check with that team to ensure your implementation is correct.

Yahya Farag said:

3) Is the USB 3.0 Superspeed TX -> RX correctly implemented

Is this being routed directly to a RPI5? Is there no USB connector, just a direct connection?

If so, there should be 100nF caps on the TX coming from the TUSB9261, and 100nF caps on the TX coming from the RPI5.

The USB3 spec requires that there are 100nF caps on each TX lane for AC coupling: https://www.ti.com/lit/an/slla414a/slla414a.pdf?ts=1772469041234&ref_url=https%253A%252F%252Fwww.google.com%252F

Yahya Farag said:

4) Are the SATA TX, RX pairs entering the M.2 Connector correctly, and is it fine for bridge power and ssd power to be the same as mentioned in (1)

Will check in review.

Yahya Farag said:

5) Is the Flash memory P# in use compatible (opcodes) - also, since tusb962x flasher is only for windows will programming flash with windows tool generated .bin files be feasible, and what settings would work best with RPI linux

We do have a linux version of the flashburner, if that would be better I can provide that instead. However yes, I believe .bin files generated in windows should still work for linux.

Thanks,

Ryan

Hi Yahya,

Yahya Farag said:

2)The 1.1V rail powers up, and its power good enables the a load switch to the 3.3V rail which powers the tusb 3.3V along with the m.2 SATA SSD. The supervisor IC is open drain and pulls the reset line low for 10ms after the 3.3V crosses the 2.9V threshold.

Understood. This should be fine for power-up timing.

Yahya Farag said:

3) Yes the usb 3.0 is coming directly from the rpi cm5 to the tusb. There are AC coupling caps for the TX on the module which i route to the RX on the TUSB. (along with the coupling caps on the rx to the rpi cm5 connected to the TX on the tusb)

I was going to ask, as I don't see caps on the TX of the RPI module. Please confirm there are 100nF caps on TX of the RPI module.

Yahya Farag said:

5) Yes i would be very interested in the linux version of the firmware that would help out a lot!

Please accept my E2E friend request, and I can send that over PM.

For schematic review:

Please ensure XI/XO are connected to VSSOSC, and that VSSOSC does not connect to PCB ground.

Yahya Farag said:

4) Are the SATA TX, RX pairs entering the M.2 Connector correctly, and is it fine for bridge power and ssd power to be the same as mentioned in (1)

For this, the SATA TX/RX pairs look coupled correctly, I would just confirm that the M.2 connector the SATA pins are routed to match the M.2 goldfingers being slotted into the connector.

How do you mean by the bridge and SSD power? Do you mean how power is provided to the SSD? You should be able to route power similar to how the TUSB9261DEMO board does it:

Otherwise, I don't have any other notes.

Thanks,

Ryan

Thank you for reviewing. What i meant by bridge vs ssd power us that the tusb 3.3V rail is the same rail as the one that powers the m.2 ssd, so they both come up at the same time and by concern was that in the refrence design its for an older HDD sata interface, Where the 5V rail for it is enabled by one of the tusb gpio pins and the dual channel 5V load switch, I dont have that and wanted to know if that something I should implement. Thank you!

Hi Yahya,

I'm not familiar with power requirements for an M.2 connector or SSD, so I can't say for sure whether it's needed or not. I see you only have 3.3V on your M.2 connector, if 5V isn't needed, then how you have it now is likely ok.

Be sure to accept my friend request so I can send that linux flashburner over. If you hover my profile on E2E you should see an option to accept it.

Thanks,

Ryan