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TCA6416A: TCA6416APWR

Part Number: TCA6416A
Other Parts Discussed in Thread: PCF8574, TCA9554, TCA9554A, TCA9555, PCF8574A, PCA9554A, PCA9555, PCA9554, PCF8575

EMESR-04-IO EXP.pdf 

I am using the TCA6416APWR I/O expander in my design. Some of the I/O pins are not being used, so I am planning to leave them as NC (Not Connected).

Please review the attached design and confirm whether all the connections are correct.

Regarding Pin 1 (INT): I have already placed a pull-up resistor on this pin. Since I am connecting this interrupt signal to an FPGA bank, I have made the pull-up optional. Kindly confirm whether this pull-up resistor is sufficient for proper interrupt operation, or if this configuration could cause any functional issues.

  • Hi Prajesh,

    U83 - TCA6416APWR

     

     

    Check

    Status?

    Comments

    Within Supply Voltage Range?

     Good

    PCA Devices - 2.3 V - 5.5 V

    TCA Devices - 1.65 V - 5.5 V

    TCAL Devices - 1.08 V - 3.6 V

    Local Decoupling Capacitors

    Good

    Generally, a 0.1-uF capacitor is placed on VCC, as close to the device as possible

    Verify the schematic pinout matches the data sheet pinout

    Good

     

    Check that the pullup resistors are present on the SDA and SCL net within the schematic.

    Verify

     

    Unused GPIO pins configured as INPUT’s are biased to either VCC or GND via resistor

    Verify

    Most of TI's IO expander portfolio do not include internal pull-up resistors on the p-port pins; the exceptions are PCF8575, PCF8574, PCF8574A, TCA9555|PCA9555, PCA9554|TCA9554, and TCA9554A|PCA9554A and therefore can be left floating.

     

    An alternative approach is after powering up the device, any unused p-port pins can be set as an output (does not matter if set high or low).

     

    TCAL agile IO expanders also have the ability to enable internal PU or PD resistors.

    GPIO pins configured to OUTPUT must be current limited externally

     Verify

    i.e. the push-pull output sources current from VCC or sinks current to GND. Ensure that the output is never tied directly to VCC, GND, or to another output that could contend with the push/pull output. Otherwise, IOH/IOL may not be limited and could exceed abs. max conditions of the device which could cause permanent damage.

    Device address is unique on the bus unless using an I2C switch or I2C MUX to resolve conflicts

    Good

    only 1 device

    If the device has a /RESET pin, bias the pin high (preferably with a pull-up resistor) after powering up.

    Good

    4.99k to 3.3V

    If the device has a /INT pin and the /INT pin is used, tie this pin to a pull-up resistor.

    Verify

    /INT pin is an open-drain output pin. It requires a pull-up resistor for the logic high. 

    If the FPGA will provide this, the external pullup on the pcb is not needed. 

    Regards,

    Tyler

  • Some of the I/O pins are not being used, so I am planning to leave them as NC (Not Connected) is it fine ?

  • Hi Prajesh,

    If the I/O pins are not being used, the recommendation is to connect these I/O's to a pull-up or pull-down resistor to keep the input from floating. 

    If you are space constrained on the PCB, you may keep the I/O floating and configure it to be OUTPUT direction through the configuration register. 

    Regards,

    Tyler