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SN65DSI86: Schematics review

Part Number: SN65DSI86

We need a schematics review of the DSI to eDP bridge with the iMX95 processor. DSI interfaces connected from the processor to the bridge, the eDP interfaces from the bridge is going to a smarc standard connector.

Please find the schematics

dsi_edp_bridge_sch_texas.pdf 

  • Hi Binahah,

    I will review the schematic and get back to you with feedback. Please give me a week at most to review this.

    Best,

    Miguel

  • Hi Binahah,

    I cannot upload images or files under E2E currently, there seems to be some sort of system issue on the website. I will upload my current feedback over text and if the issue is resolved provide the full annotated document later.

    Confirmations:

    • A1] ADDR = 0, Slave Addr = 0x2C (0101100)
    • A7] REFCLK, MIPI CLK shall supply DisplayPort PLL.
    • H8 and H9] Double confirm use of 100kΩ resistors on the AUX channel for DisplayPort end application - currently none are indicated.
    • F8, F9, E8, E9, C8, C9, B8 and B9] Double confirm use of 100kΩ resistors on the AUX channel for DisplayPort end application - currently none are indicated.
    • H1 and J1] Confirmed 1.8V pull-up and 2k resistor for SCL and SDA (I2C2).
    • Power configurations look correct for decoupling capacitors.

    Best,

    Miguel