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DS280DF810: retimer configure

shanjin wu
Prodigy 10 points

Part Number: DS280DF810

The Kunpeng cpu we use, the 100G network, is enhanced by the retimer chip ds280df810. At present, the single lane 25g/10g is normal. The bond speed of the 4-way 25g group can reach 97g, but the configuration of a single lane 100G cannot be linked, and the optical port has no light output. I don't know how to configure this retimer in this case?

  • 0
    TI__Mastermind 41908 points

    Hi Shanjin,

    The maximum data rate on a single DS280DF810 channel is 28.4 Gbps.  In 100G case, are you exceeding this?

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Prodigy 30 points

    The 100G application I am currently using employs four lanes to achieve 100G. The 100G signal from the SOC is transmitted through the DS280BF810 and then connected to a 100G-SR4 optical module. However, no optical signal comes out from the optical module. Could you please confirm if the DS280 is required for this application scenario and how it should be configured? Could you send me the programming manual for the DS280BF810? Additionally, when I configure the 4-lane signal for a 25G network, the retimer chip does not need to be configured, and the 25G network can be used normally with normal bandwidth.

  • 0 in reply to Daisy Yang
    TI__Mastermind 41908 points

    Hi Daisy,

    Do you know if line rate is still 25.78125 Gbps for 100G-SR4 case?  If so, this should work fine.  I would recommend checking signal detect and CDR lock status for this test case.

    You can access the programing guide at the following link: https://www.ti.com/drr/opn/DS280DF810-DESIGN

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Prodigy 10 points

    Now I read the value of register 0x78 of the DS280DF810 as 0x30, and the value of register 0x2F as 0x54. May I ask whether the DS280DF810 has any configuration requirements for using 100G bonding of 4 lanes of 25G as a combined configuration?

  • 0 in reply to shanjin wu
    TI__Mastermind 41908 points

    Hi Shanjin,

    Each channel operates independently, so there is no difference between 4 independent 25G lanes and 4 bonded 25G lanes for the retimer.  After configuring your SoC, for 4x25G (100G), you could try CDR reset/release sequence on the retimer to see if this has any impact.

    You mentioned you observe the issue when using 100G-SR4 optical module.  Are you able to try QSFP28 loopback or QSFP28 DAC?

    Thanks,

    Drew