Part Number: DP83822I
Hi all, I'm working through trying to get ethernet up and running in Linux on a custom board.
TISDK: ti-processor-sdk-linux-am64xx-evm-11.01.05.03
2 PHY on CPSW3G (going offboard)
1 PHY on ICSSG0 (AC coupled to onboard WIZ5500)
AM64 and all three phy are sourced from a clock buffer (LMK1C1104DQFR) off the same 25MHz clock(O 25,0-JT21CT-A-P-1,8-LF).
I've been able to get the phys recognized by the OS, drivers are loaded into the kernel (rather than modules). I also get link detection for the CPSW when plugging a cable in, and can read registers for the DP83822I.
Phy are about 3-5cm from the AM64.
Phy are strapped for RGMII (pin28 mode 3; 6K2 to 3v3, 1K96 to GND; pin 26 floating)
I can't get any RX.
Line 254: [ 1.570121] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
Line 255: [ 1.612422] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
Line 267: [ 1.763282] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
Line 268: [ 1.808416] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
Line 276: [ 1.975083] davinci_mdio 8000f00.mdio: phy[9]: device 8000f00.mdio:09, driver TI DP83822
Line 277: [ 1.983421] davinci_mdio 8000f00.mdio: phy[17]: device 8000f00.mdio:11, driver TI DP83822
Line 430: [ 19.247684] am65-cpsw-nuss 8000000.ethernet eth1: PHY [8000f00.mdio:09] driver [TI DP83822] (irq=POLL)
Line 432: [ 19.775258] am65-cpsw-nuss 8000000.ethernet eth0: PHY [8000f00.mdio:11] driver [TI DP83822] (irq=POLL)
Line 451: [ 27.657776] davinci_mdio 30032400.mdio: Configuring MDIO in manual mode
Line 452: [ 27.778279] davinci_mdio 30032400.mdio: davinci mdio revision 1.7, bus freq 1000000
Line 453: [ 27.984691] davinci_mdio 30032400.mdio: phy[21]: device 30032400.mdio:15, driver TI DP83822
Line 514: [ 32.186445] TI DP83822 30032400.mdio:15: attached PHY driver (mii_bus:phy_addr=30032400.mdio:15, irq=POLL)
Line 253: [ 1.555158] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA00903, cpsw version 0x6BA80903 Ports: 3 quirks:006
Line 256: [ 1.622800] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.4
Line 257: [ 1.630077] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512, Policers 32
Line 258: [ 1.640166] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:1
Line 259: [ 1.670072] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 16
Line 430: [ 19.247684] am65-cpsw-nuss 8000000.ethernet eth1: PHY [8000f00.mdio:09] driver [TI DP83822] (irq=POLL)
Line 431: [ 19.294251] am65-cpsw-nuss 8000000.ethernet eth1: configuring for phy/rgmii-rxid link mode
Line 432: [ 19.775258] am65-cpsw-nuss 8000000.ethernet eth0: PHY [8000f00.mdio:11] driver [TI DP83822] (irq=POLL)
Line 433: [ 19.798737] am65-cpsw-nuss 8000000.ethernet eth0: configuring for phy/rgmii-rxid link mode
Line 437: [ 22.894501] am65-cpsw-nuss 8000000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
aliases {
serial0 = &mcu_uart0;
serial1 = &main_uart0;
i2c0 = &main_i2c0;
i2c1 = &main_i2c1;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
ethernet2 = &icssg0_prueth_port0;
adc0 = &tscadc0;
rtc0 = &ab1805_rtc;
cpu0 = "/cpus/cpu@0";
};
/* ICSSG0 PRUETH single-EMAC on RGMII1 (port0) */
icssg0_prueth: icssg0-eth {
status = "okay";
compatible = "ti,am642-icssg-prueth";
sram = <&oc_sram>;
pinctrl-names = "default";
pinctrl-0 = <&mypruicssg0rgmii1_pins_default &icssg0_phy_ctrl_pins_default>;
ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";
ti,pruss-gp-mux-sel = <2>, /* MII mode */
<2>,
<2>,
<2>, /* MII mode */
<2>,
<2>;
ti,mii-g-rt = <&icssg0_mii_g_rt>;
ti,mii-rt = <&icssg0_mii_rt>;
ti,iep = <&icssg0_iep0>, <&icssg0_iep1>;
ti,pa-stats = <&icssg0_pa_stats>;
interrupt-parent = <&icssg0_intc>;
interrupts = <24 0 2>, <25 1 3>;
interrupt-names = "tx_ts0", "tx_ts1";
dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
<&main_pktdma 0xc201 15>, /* egress slice 0 */
<&main_pktdma 0xc202 15>, /* egress slice 0 */
<&main_pktdma 0xc203 15>, /* egress slice 0 */
<&main_pktdma 0xc204 15>, /* egress slice 1 */
<&main_pktdma 0xc205 15>, /* egress slice 1 */
<&main_pktdma 0xc206 15>, /* egress slice 1 */
<&main_pktdma 0xc207 15>, /* egress slice 1 */
<&main_pktdma 0x4200 15>, /* ingress slice 0 */
<&main_pktdma 0x4201 15>; /* ingress slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
icssg0_prueth_port0: port@0 {
reg = <0>;
phy-mode = "rgmii-id";
phy-handle = <&icssg0_phy1>;
local-mac-address = [00 00 00 00 00 00];
};
port@1 {reg = <1>; status = "disabled"; fixed-link { speed = <100>; full-duplex; }; };
};
};
cpsw3g_phy9_ctrl_pins: cpsw3g-phy9-ctrl-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0020, PIN_OUTPUT_PULLUP, 7) /* (P20) OSPI0_D5.GPIO0_8 */
AM64X_IOPAD(0x00a0, PIN_INPUT_PULLUP, 7) /* (N16) GPMC0_WPn.GPIO0_39 */
>;
};
/* PHY 11 Control Pins */
cpsw3g_phy11_ctrl_pins: cpsw3g-phy11-ctrl-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0024, PIN_OUTPUT_PULLUP, 7) /* (N18) OSPI0_D6.GPIO0_9 */
AM64X_IOPAD(0x00a4, PIN_INPUT_PULLUP, 7) /* (N17) GPMC0_DIR.GPIO0_40 */
>;
};
cpsw_rgmii2_pins_default: cpsw-rgmii2-default-pins {
bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
>;
};
/* CPSW RGMII1/2 combined group */
cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
>;
};
/* CPSW MDIO */
mymdio1_pins_default: mymdio1-default-pins {
bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x015c, PIN_OUTPUT, 4) /* (Y6) PRG1_MDIO0_MDC.MDIO0_MDC */
AM64X_IOPAD(0x0158, PIN_INPUT, 4) /* (AA6) PRG1_MDIO0_MDIO.MDIO0_MDIO */
>;
};
/* ICSSG0 MDIO */
mypruicssg0mdio1_pins_default: mypruicssg0mdio1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
>;
};
icssg0_phy_ctrl_pins_default: icssg0-phy-ctrl-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x021c, PIN_OUTPUT_PULLUP, 7) /* (B14) SPI1_CS0.GPIO1_47 */
AM64X_IOPAD(0x0228, PIN_INPUT_PULLUP, 7) /* (B15) SPI1_D0.GPIO1_50 */
>;
};
/* ICSSG0 RGMII1 */
mypruicssg0rgmii1_pins_default: mypruicssg0rgmii1-default-pins {
bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0160, PIN_INPUT, 2) /* (Y1) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
AM64X_IOPAD(0x0164, PIN_INPUT, 2) /* (R4) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
AM64X_IOPAD(0x0168, PIN_INPUT, 2) /* (U2) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
AM64X_IOPAD(0x016c, PIN_INPUT, 2) /* (V2) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
AM64X_IOPAD(0x0178, PIN_INPUT, 2) /* (T3) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
AM64X_IOPAD(0x0170, PIN_INPUT, 2) /* (AA2) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
AM64X_IOPAD(0x018c, PIN_OUTPUT, 2) /* (Y3) PRG0_PRU0_GPO11.PRG0_RGMII1_TD0 */
AM64X_IOPAD(0x0190, PIN_OUTPUT, 2) /* (AA3) PRG0_PRU0_GPO12.PRG0_RGMII1_TD1 */
AM64X_IOPAD(0x0194, PIN_OUTPUT, 2) /* (R6) PRG0_PRU0_GPO13.PRG0_RGMII1_TD2 */
AM64X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (V4) PRG0_PRU0_GPO14.PRG0_RGMII1_TD3 */
AM64X_IOPAD(0x01a0, PIN_INPUT, 2) /* (U4) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
AM64X_IOPAD(0x019c, PIN_OUTPUT, 2) /* (T5) PRG0_PRU0_GPO15.PRG0_RGMII1_TX_CTL */
>;
};
/* ---------- ETHERNET (CPSW + ICSSG0) ---------- */
/* CPSW core */
&cpsw3g {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cpsw_rgmii1_pins_default
&cpsw_rgmii2_pins_default
&cpsw3g_phy9_ctrl_pins
&cpsw3g_phy11_ctrl_pins>;
/* Map HW8_TS_PUSH to GENF1 */
cpts@3d000 { ti,pps = <7 1>; };
};
/* CPSW ports: RGMII */
&cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy11>; status = "okay"; ti,mac-idle-ctrl = <2>; ti,syscon-efuse = <&main_conf 0x4044>;};
&cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy9>; status = "okay"; ti,mac-idle-ctrl = <2>; ti,syscon-efuse = <&main_conf 0x4048>;};
/* CPSW MDIO + DP83822 PHYs (with resets and IRQs) */
&cpsw3g_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mymdio1_pins_default>;
/* MDIO address 11 (RGMII1) — reset on P20 -> GPIO0_6 */
cpsw3g_phy9: ethernet-phy@9 {
reg = <0x09>;
compatible = "ethernet-phy-id2000.a240","ti,dp83822";
rx-internal-delay-ps = <2000>; /* enable RX delay (fixed by driver) */
/* tx-internal-delay-ps = <2000>; */ /* enable RX delay (fixed by driver) */
reset-gpios = <&main_gpio0 8 GPIO_ACTIVE_LOW>; /* P20 RESET_PHY_0 */
/*
interrupt-parent = <&main_gpio0>;
interrupts = <39 IRQ_TYPE_EDGE_FALLING>; */ /* N16 INT_PWDN_N.0 */
reset-assert-us = <10000>;
reset-deassert-us = <50000>;
};
/* MDIO address 9 (RGMII2) — reset on N18 -> GPIO0_7 */
cpsw3g_phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "ethernet-phy-id2000.a240","ti,dp83822";
rx-internal-delay-ps = <2000>; /* enable RX delay */
/*tx-internal-delay-ps = <2000>; */ /* enable RX delay */
reset-gpios = <&main_gpio0 9 GPIO_ACTIVE_LOW>; /* N18 RESET_PHY_1 */
/*
interrupt-parent = <&main_gpio0>;
interrupts = <40 IRQ_TYPE_EDGE_FALLING>; */ /* N17 INT_PWDN_N.1 */
reset-assert-us = <10000>;
reset-deassert-us = <50000>;
};
};
/* ICSSG0 MDIO + DP83822 PHY @ (0x15) with reset on B14 -> GPIO1_47 */
&icssg0_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mypruicssg0mdio1_pins_default>;
power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
icssg0_phy1: ethernet-phy@15 {
reg = <0x15>; /* 15 */
compatible = "ethernet-phy-id2000.a240","ti,dp83822";
rx-internal-delay-ps = <2000>; /* enable RX delay */
tx-internal-delay-ps = <2000>; /* enable RX delay */
reset-gpios = <&main_gpio1 47 GPIO_ACTIVE_LOW>; /* B14 RESET_PHY_4 */
/*
interrupt-parent = <&main_gpio1>;
interrupts = <50 IRQ_TYPE_EDGE_FALLING>; */ /* B15 INT_PWDN_N.4 */
reset-assert-us = <10000>;
reset-deassert-us = <50000>;
};
};
root@am64xx-evm:/usr/share/wl18xx# ethtool eth0
Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Supported pause frame use: Symmetric
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Advertised pause frame use: Symmetric
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 100Mb/s
Duplex: Full
Auto-negotiation: on
Port: Twisted Pair
PHYAD: 17
Transceiver: external
MDI-X: Unknown
Supports Wake-on: gs
Wake-on: d
SecureOn password: 00:00:00:00:00:00
Current message level: 0x000020f7 (8439)
drv probe link ifdown ifup rx_err tx_err hw
Link detected: yes
root@am64xx-evm:/usr/share/wl18xx# ethtool eth1
Settings for eth1:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Supported pause frame use: Symmetric
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Advertised pause frame use: Symmetric
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Speed: 10Mb/s
Duplex: Half
Auto-negotiation: on
Port: Twisted Pair
PHYAD: 9
Transceiver: external
MDI-X: Unknown
Supports Wake-on: gs
Wake-on: d
SecureOn password: 00:00:00:00:00:00
Current message level: 0x000020f7 (8439)
drv probe link ifdown ifup rx_err tx_err hw
Link detected: no
root@am64xx-evm:/usr/share/wl18xx# ethtool -S eth0 | grep -E "rx|tx"
p0_rx_good_frames: 92
p0_rx_broadcast_frames: 76
p0_rx_multicast_frames: 16
p0_rx_crc_errors: 0
p0_rx_oversized_frames: 0
p0_rx_undersized_frames: 0
p0_rx_octets: 27196
p0_tx_good_frames: 0
p0_tx_broadcast_frames: 0
p0_tx_multicast_frames: 0
p0_tx_octets: 0
p0_tx_64B_frames: 0
p0_tx_65_to_127B_frames: 16
p0_tx_128_to_255B_frames: 0
p0_tx_256_to_511B_frames: 76
p0_tx_512_to_1023B_frames: 0
p0_tx_1024B_frames: 0
p0_rx_bottom_fifo_drop: 0
p0_rx_port_mask_drop: 0
p0_rx_top_fifo_drop: 0
p0_tx_mem_protect_err: 0
p0_tx_pri0: 0
p0_tx_pri1: 0
p0_tx_pri2: 0
p0_tx_pri3: 0
p0_tx_pri4: 0
p0_tx_pri5: 0
p0_tx_pri6: 0
p0_tx_pri7: 0
p0_tx_pri0_bcnt: 0
p0_tx_pri1_bcnt: 0
p0_tx_pri2_bcnt: 0
p0_tx_pri3_bcnt: 0
p0_tx_pri4_bcnt: 0
p0_tx_pri5_bcnt: 0
p0_tx_pri6_bcnt: 0
p0_tx_pri7_bcnt: 0
p0_tx_pri0_drop: 0
p0_tx_pri1_drop: 0
p0_tx_pri2_drop: 0
p0_tx_pri3_drop: 0
p0_tx_pri4_drop: 0
p0_tx_pri5_drop: 0
p0_tx_pri6_drop: 0
p0_tx_pri7_drop: 0
p0_tx_pri0_drop_bcnt: 0
p0_tx_pri1_drop_bcnt: 0
p0_tx_pri2_drop_bcnt: 0
p0_tx_pri3_drop_bcnt: 0
p0_tx_pri4_drop_bcnt: 0
p0_tx_pri5_drop_bcnt: 0
p0_tx_pri6_drop_bcnt: 0
p0_tx_pri7_drop_bcnt: 0
rx_good_frames: 0
rx_broadcast_frames: 0
rx_multicast_frames: 0
rx_pause_frames: 0
rx_crc_errors: 0
rx_align_code_errors: 0
rx_oversized_frames: 0
rx_jabber_frames: 0
rx_undersized_frames: 0
rx_fragments: 0
rx_octets: 0
tx_good_frames: 92
tx_broadcast_frames: 76
tx_multicast_frames: 16
tx_pause_frames: 0
tx_deferred_frames: 0
tx_collision_frames: 0
tx_single_coll_frames: 0
tx_mult_coll_frames: 0
tx_excessive_collisions: 0
tx_late_collisions: 0
rx_ipg_error: 0
tx_carrier_sense_errors: 0
tx_octets: 27196
tx_64B_frames: 0
tx_65_to_127B_frames: 16
tx_128_to_255B_frames: 0
tx_256_to_511B_frames: 76
tx_512_to_1023B_frames: 0
tx_1024B_frames: 0
rx_bottom_fifo_drop: 0
rx_port_mask_drop: 0
rx_top_fifo_drop: 0
iet_rx_assembly_err: 0
iet_rx_assembly_ok: 0
iet_rx_smd_err: 0
iet_rx_frag: 0
iet_tx_hold: 0
iet_tx_frag: 0
tx_mem_protect_err: 0
tx_pri0: 92
tx_pri1: 0
tx_pri2: 0
tx_pri3: 0
tx_pri4: 0
tx_pri5: 0
tx_pri6: 0
tx_pri7: 0
tx_pri0_bcnt: 27196
tx_pri1_bcnt: 0
tx_pri2_bcnt: 0
tx_pri3_bcnt: 0
tx_pri4_bcnt: 0
tx_pri5_bcnt: 0
tx_pri6_bcnt: 0
tx_pri7_bcnt: 0
tx_pri0_drop: 0
tx_pri1_drop: 0
tx_pri2_drop: 0
tx_pri3_drop: 0
tx_pri4_drop: 0
tx_pri5_drop: 0
tx_pri6_drop: 0
tx_pri7_drop: 0
tx_pri0_drop_bcnt: 0
tx_pri1_drop_bcnt: 0
tx_pri2_drop_bcnt: 0
tx_pri3_drop_bcnt: 0
tx_pri4_drop_bcnt: 0
tx_pri5_drop_bcnt: 0
tx_pri6_drop_bcnt: 0
tx_pri7_drop_bcnt: 0
root@am64xx-evm:/usr/share/wl18xx# mii-tool -v eth0 2>/dev/null || true
eth0: negotiated 100baseTx-FD flow-control, link ok
product info: vendor 08:00:28, model 36 rev 0
basic mode: autonegotiation enabled
basic status: autonegotiation complete, link ok
capabilities: 100baseTx-FD 100baseTx-HD 10baseT-FD 10baseT-HD
advertising: 100baseTx-FD 100baseTx-HD 10baseT-FD 10baseT-HD flow-control
link partner: 100baseTx-FD 100baseTx-HD 10baseT-FD 10baseT-HD flow-control
root@am64xx-evm:/usr/share/wl18xx# phytool read eth0/0x11/0x17
0x1a49
root@am64xx-evm:/usr/share/wl18xx# phytool read eth0/0x09/0x17
0x1a41
Realistically, my goal is to try to get one of the offboard ethernet (eth0: RGMII2) up and running. I don't believe I have been able to successfully put the phy into loopback mode to test that way - I'm hoping for some next steps :D
