Part Number: AM2434
For performance and space reasons we want to use the OSPI Controller on an AM2434 (ALV) SoC for OSPI and QSPI with two separate #CS respectively (i.e. 8-8-8 and 4-4-4 or 1-1-4).
I wonder if someone has experience with this or can lead us to documentation or application notes where someone has tried this before?
What about the physical length matching of the traces which are not symmetrical in count, then?
For each different #CS access the bus topology will be different. How can this be reliable?
Regards, Frank