Part Number: DP83TC811S-Q1
Hi TI team,
I am designing a board using the DP83TC811S-Q1 and attempting to use the device in SGMII mode (4-wire SGMII).
However, I’m running into an issue with the datasheet documentation regarding the bootstrap (strap) configuration.
THE ISSUE
From the datasheet, I can find that:
- The device supports SGMII as a MAC interface
- Several pins are marked as strap pins (S)
- Bootstrap values are sampled on reset
However, I am unable to find a clear bootstrap configuration table that defines:
Which strap pin combinations (HIGH/LOW) correspond to selecting SGMII mode (specifically 4-wire SGMII) at power-up.
WHAT I NEED
Could you please provide:
- The bootstrap configuration table (or equivalent) that maps strap pin states to:
- MII / RMII / RGMII / SGMII modes
- The exact strap settings required to boot into 4-wire SGMII
- Any recommendations for PHY-to-PHY SGMII operation (since this is not a typical MAC↔PHY use case)