SN65DSI83Q1-EVM: default / reset register values

Part Number: SN65DSI83Q1-EVM

I have both a sn65dsi83q1-evm and sn65dsi85-evm.  After power on and reseting by depressing the reset button.  When I read the default / reset register values.  All read according to the data sheets - except registers 0x0B and 0x11. 

The value I read from 0x0B is 0x12.  According to the data sheets - it's supposed to be 00.

The value I read from 0x11 is 0x55.  According to the data sheets - it's supposed to be 00.

Have the defaults been changed and not updated in the data sheets?

  • Hi Gerald,

    I will check the register values on the EVM and get back to you tomorrow.

    Are the other registers reading the default expected values as needed? I wanted to confirm there is successful I2C communication.

    Best regards,
    Ikram

  • Yes.  The other default values read according to the data sheets.  And I'm able to write and read the registers. 

    At the moment, all I'm trying to do is use the internal 27MHz REFCLK to generate a continous LVDS clock of 54MHz and have the PLL lock.  I write 0x09 0x01, 0x0A 0x02, 0x0B 0x01, 0x18 0x08, 0x3C 0x10, 0x0D 0x01.  Then I read 0x0a 0x82, 0xE5 0x01.  So the PLL is enabled but not locked.  I can see a 54MHz LVDS clock with a oscillosope. But, if I'm reading 0xE5 correctly - the PLL isn't locked.

  • Hi Gerald, please give me till tomorrow to check this and get back to you.


  • Hi Gerald,

    I apologize for the delay to get back to this thread. I checked the registers and 0xB and 0x11 read 0x00 on startup as mentioned in the datasheet as default.

    Could if be that you are writing over certain registers during initialization?

    In any case, you can use the DSI Tuner GUI to enter the configurations for display timings, clock source (REFCLK or DSI clock) and try with test pattern to check if the output generates video as expected.

    Best regards,
    Ikram