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DS90UB960-Q1EVM: DSER ds90ub960-q1 dropframe when plug 4 camera

Bui Van Hieu
Prodigy 10 points

Part Number: DS90UB960-Q1EVM

  • Enviroment : currently, we are using an FPGA to simulate a camera. The system is TDA4 -> Dser 960 -> Ser 971 -> FPGA like picture above
    - SER971 use this mode : Synchronous FPD-Link III / 50 Mbps BC Rate
    - DSER960 : Internal Frame sync via GIPO3 is currently enabled on 30 FPS. 
    - FPGA simulation camera 1920 * 1380 yuv422, mipi csi 2 800mbps, 4 lines
    The FPGA side doesn't wait for the framesync signal from the GPIO3 but periodically sends back 30 FPS. 

    * Situation: When using 2 simulation cameras, the TDA4 recognizes both cameras at 30 fps, but when using 4 simulation cameras, the TDA4 experiences frame drops. I read the I2C on DSER UB960 and saw register 0x4E with value like picture The full I2C log, including init, deser, and ser, and the runtime log are attached.


    4_fpga.txt 
  • 0
    TI__Guru** 116880 points

    Hello Bui,

    This behavior is expected since the DES Input bandwidth is higher than the supported output bandwidth.

    Calculating your 4-cameras total bandwidth = ~6.3 Gbps, while the max supported output bandwidth is 5.53Gbps, after calculating the CSI required overhead.

    The solution is to either reduce the resolution on the video source, change the video type from YUV to RAW, or use both UB960 CSI TX outputs instead of just one.