Part Number: TMDS1204
I am using TMDS1204 IC in my board, for HDMI 2.1 validation. I am not achieving HDMI FRL data as an output. We are generating HDMI 2.1 FRL data from the FPGA and send it to the FRL Monitor, but now receving FRL mode video as output. For debugging purpose, as of now, we removed HDMI TX and RX retimer TMDS1204 ICs in my board. And, take wiring which is length matched and checking on the VIO tool, still we are not getting proper FRL data. Please suggest is there any issues you are facing like this., or we are missing something. Because of more bit error, we are not achieving FRL data at the output.
I will attach the eye diagram image for your reference. Is there any possibility to reduce bit error. Please suggest.
