Part Number: DP83867E
Our team is using eval board DP83867E SGMII EVM to communicate to a DUT over SGMII mode unsuccessfully.
The first attempt was using the eval board default configurations through strap resistors but after some digging into the DUT needs we have changed the strap resistor configuration per the following:
|
|
EV Board |
FUNCTION |
|
RX_D0 |
MODE 1 (Rhi=OPEN, Rlo=OPEN) |
PHY_ADD1=0, PHY_ADD0=0 |
|
RX_D2 |
MODE 1 (Rhi=OPEN, Rlo=OPEN) |
PHY_ADD3=0, PHY_ADD2=0 |
|
LED_0 |
MODE 2 (R6=11K, R8=2.49K) |
MIRROR ENABLE = 0, SGMII ENABLE = 1 |
|
LED_1 |
MODE 1 (R12=OPEN, R13 = OPEN) |
ANEG_SEL = 0, RGMII CLOCK[TX2] =0 |
|
LED_2 |
MODE 1 (R20=OPEN, R22 = OPEN) |
RGMII CLOCK[TX1] = 0, RGMII CLOCK[TX0]=0 |
|
RX_CTL |
MODE 4 (R7=2.49K and R9= OPEN) |
AUTONEG DISABLE = 1 |
Our DUT requires SGMII mode and Auto-negotiation disabled.
As a parallel path the team is also trying to communicate through MDIO pin to confirm strap resistor configurations and/or configure through registers.
Questions
- Per table 7-10 on datasheet DP83867E/IS/CS 01/2025, “When auto-negotiation is disabled writing to this bit allows the port Duplex capability to be selected.” Is there a way to configure this through a strap resistor, if so which pin of the device this would be? If we do nothing, what is the default duplex mode?
- Do we need to consider anything on the DUT that will require a change to RX_D0-RX_D2 for proper SGMII mode?
- Originally the team had two eval boards in loopback mode talking to each other over SGMII with the default configurations but after changing the configurations (on both eval boards) to match the table above we no longer can communicate in loopback mode with the second eval board. Any thoughts on why this could be and recommendations for troubleshooting?
- What is the driver strength of the TX signals?
