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DP83822I: Packet alignment and preamble length

Dom
Prodigy 20 points

Part Number: DP83822I
Other Parts Discussed in Thread: DP83826AI,

Dear support team, 

the microcontroller we're planning to use has an Ethernet MAC with specific requirements regarding the packet alingment and preamble length, limiting the number of interoperable PHYs. 

In 10 MBit mode the MAC requires the packet to be octet-aligned. It cannot handle packets correctly if the preamble has been shortened, leaving the packet non-octet-aligned. Also it requires a preamble length of at least 1 byte. 

Additionally the PHY needs to meet the EtherCAT requirements. We first planned to use the DP83826AI but due to external contraints we have to switch to a current mode PHY. 

Does the DP83822I comply with these requirements? 

Thank you

  • +1
    TI__Mastermind 35975 points

    Hi Dominik,

    You're looking for whether DP83822 will pad the preamble to octet align packets similar to DP83826A correct? The answer for DP83822 will be the same DP83826A's answer in this E2E thread. These PHYs should share any preamble-padding logic between them.

    DP83822 complies with Ethercat requirements, however you will need reg access for ethercat odd nibble. Please ensure you can modify registers in the design if needing this.

    Best,

    Shane