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DP83867IS: Issues when connected to a network switch

Stebin Basil Paulose
Prodigy 10 points

Part Number: DP83867IS

We have implemented 10/100/1000 Ethernet using the Texas Instruments DP83867ISRGZR with discrete magnetics.

Observed behavior:

  • When directly connected to a laptop, there are no issues. The link comes up correctly and the negotiated speed is stable.

  • When connected through a dumb/unmanaged switch:

    • 100 Mbps works without issues.

    • At 1 Gbps, the link comes up, but during iperf testing we observe around ~100 retries/retransmissions.

  • When connected to a managed switch:

    • The link continuously goes up and down repeatedly.

    • This behavior occurs in both 100 Mbps and 1 Gbps modes.

Test conditions:

  • Auto-negotiation enabled

  • Full duplex

Could you help identify possible causes or recommended debug steps for this issue?

  • 0
    TI__Mastermind 35735 points

    Hi Stebin,

    We have a DP83867 troubleshooting guide with debug steps for all kinds of issues. Are you able to look through this document and perform all the health checks and debug steps included?

    If you don't believe there is an issue with power and clocking, and you're able to get register access, you may want to start with loopback testing. The PHY has two loopback tests I'd recommend starting with: MII loopback (For the MAC interface) and Reverse loopback (For the MDI). See if you're able to loop back data correctly on either side to narrow down where the problem is.

    Best,

    Shane

  • 0 in reply to Shane Hauser
    Prodigy 10 points

    Hi Shane,

    When connected directly to a laptop, the board works well with stable link and communication, so is there any reason to still suspect power or clocking issues? We are able to access PHY registers without any issue as well.

    We have already performed MDI loopback testing using another DP83867 as the link partner. When the board was connected directly to the link partner, the PRBS lock status was high and the test passed. However, when the connection was made through a dumb D-Link switch, the PRBS test failed.

    We also performed the MII loopback test, and it shows no issues on the MAC interface side.

  • 0 in reply to Stebin Basil Paulose
    TI__Mastermind 35735 points

    Hi Stebin,

    Its good you can access registers, and that you can link up with the laptop. Clocking issues can be subtle and do not always present in a straightforward way (could be loss of reg access, could be unstable link,...). Because of this I typically ask to confirm that the clocking and powerup timings are ok when any issue presents itself.

    Thanks for checking the loopback tests. The issue looks to be on the MDI path, which would narrow down to the PHY MDI implementation, the cable used, or the switch itself. The next step would be to test the switches and cable with our DP83867EVM and see if the EVM is able to hold a link at 1G. The EVM is a known good test platform, so if this can link up with your two switches then we know the discrepancy is with the MDI implementation on your test board.

    If the EVM struggles to link up with your switches then I recommend swapping the cable or checking that these switches can link up at 1G with other, non-DP83867 link partners. Certainly let me know your thoughts.

    Best,

    Shane

  • 0 in reply to Shane Hauser
    Prodigy 10 points

    Hi Shane,

    Thank you for your help. We were able to sort out the issue, and it turned out to be related to the magnetics implementation, particularly the choke section.

    Our assumption is that the choke did not provide sufficient common-mode rejection in the required frequency range. The board showed the same behavior both when connected through a switch and when connected directly to a PC using a 100 m Ethernet cable. Based on this, we suspect that the particular switch was introducing common-mode noise similar to what was observed with the long cable.

    We replaced the discrete magnetics implementation with an integrated RJ45 MagJack for testing, and the issue was resolved. In the discrete implementation of the board, the transformer selection and layout were implemented according to the recommendations, so we believe the issue is specifically related to the choke performance.