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THVD4431A: THVD4431A: Clarification on Partial Power-Down (Ioff) protection and leakage current when VCC = 0V

Andy Liu
Prodigy 160 points

Part Number: THVD4431A

Hello TI Team,
I am designing a high-reliability industrial system using THVD4431ARHAR. 
In our application, this device may experience a partial power-down scenario, 
and I would like to clarify its behavior under the following conditions:

Application Conditions:
VCC & VIO = 0V (system power is turned off).
Bus Pins (RS-232/422/485, pin 21-31): External RS-485 or RS-232 signals from other active nodes remain present on the bus (up to +/-12V for RS-232, 5V for RS-485).

Our Questions:
1. Does the THVD4431A fully support Ioff (Partial Power-Down Protection) feature on both Bus pins and Logic I/O pins?
2. When VCC & VIO = 0V, will the Bus pins and Logic I/O pins (other pins) maintain a High-Impedance (High-Z) state?
3. Is there any risk of leakage current back-flowing (parasitic powering) from the bus pins into the VCC & VIO rails via internal ESD diodes? What is the maximum expected leakage current under this state?

  • 0
    TI__Mastermind 29802 points

    Hi Andy,

    1. I believe you are referring to the Shutdown feature (when SHDN# = 0V). If you search "Ioff" throughout our datasheet it will show the various leakage currents at each pin on the bus side. 

    2. Yes, the bus pins will remain high-impedance. I cannot say for the logic pins. It is best these are not biased while VCC and VIO are unpowered. 

    3. To my knowledge, no. You can reference "IOZD" and "IRZT" in the datasheet for the leakage current. 

    Best,

    Ethan