TCAN1145-Q1: Clarification on Partial Networking / Selective Wake-Up Behavior and Configuration Sequence

Part Number: TCAN1145-Q1

Hi Ti Team,

After modifying the logic, I observed the following behavior during Partial Networking / Selective Wake-Up testing, and I would like to cross-check whether this behavior is expected.

Observation:

1. I configured the Selective Wake-Up settings and then shut down the power supply.
2. Turn on Power Supply, then I transmitted a valid CAN wake-up frame from the CAN bus.
3. In this case,when i Send Valid Frame then INH pin became HIGH and RxD Pin low, which appears to indicate a successful wake-up event.

Then I repeated the test with a different condition:

1. Again, I shut down the power supply.
2. Re-ran the code and transmitted an invalid CAN frame.
3. In this scenario, the INH pin remained LOW and RxD Pin has 3.3v.

Based on this observation, my understanding is that:

• A valid configured wake-up frame correctly triggers the INH pin High and RXD pin Low.
• An invalid frame does not trigger wake-up and keeps INH LOW and RXD pin high.

Could you kindly confirm whether this is the correct expected behavior for Partial Networking / Selective Wake-Up operation?

Additional Clarification Required:

I also wanted to understand why the following registers/configurations are not additionally required in this flow:

• Mode Control Register
• Wake Pin Configuration
• Pin Configuration Register

Currently, selective wake-up appears to work without explicitly configuring these registers, so I would appreciate clarification on:

• Whether these registers are internally defaulted to the required state, or
• Whether they are only needed for specific use cases/features.

Current Sequence Followed:

The current flow implemented in the software is approximately:

void TCAN_operationDeviceMode(void)
{
uint8_t reg;
initQSPI_TCAN1145();
TCAN_Init();/*Already Here I set the configuratipon For the Standby */
/**************Added Only For Wake Up Frame*************/
/* Enable selective wake */

TCAN_WriteReg(TCAN_REG_INT_ENABLE_1,(1 << 6) ); // Enable bit 6 (CANINT)
/*Configure wake filter */
// MODE RELATED (0x11, 0x12) ---
TCAN_WriteReg(TCAN_WAKE_PIN_CONFIG, 0x00); // 0xFFWAKE pin disabled / default
TCAN_WriteReg(TCAN_REG_PIN_CONFIG, 0x00); //0x1c RXD/nINT default

// WUF FILTER ---
TCAN_ConfigWakeUpFilter(0x123, TCAN1145_ID_11BIT, 0xFF, NULL, FALSE);

//FRAME DETECTION (MANDATORY) ---
TCAN_WriteReg(0x44, 0xDC);//0xDC
TCAN_WriteReg(0x45, 0x00);
TCAN_WriteReg(0x46, 0x1F); // threshold
/* commit SWCFG */
TCAN_WriteReg(0x47, 0x80);
/*Clearing Bits */
TCAN_WriteReg(TCAN_REG_INT_1, 0xFF); // Clear all bits in INT_1 (0x51)
TCAN_WriteReg(TCAN_REG_INT_2, 0xFF); // Clear all bits in INT_2 (0x52)
TCAN_WriteReg(TCAN_REG_INT_3, 0xFF); // Clear all bits in INT_3 (0x53)
TCAN_WriteReg(TCAN_REG_INT_GLOBAL, 0xFF);

/* NOW enter sleep */
TCAN_EnterSelectiveWakeSleepMode();

/* wait */
Delay_sec(0.01f);
}

void TCAN_ConfigWakeUpFilter(uint32_t can_id, uint8_t id_len, uint8_t dlc, uint8_t *data_pattern, bool mask_enable)
{
int i;
uint8_t wuf_cfg = 0x00;

if (id_len == TCAN1145_ID_11BIT)
{
uint8_t sw_id3;
uint8_t sw_id4;

sw_id3 = (uint8_t)((can_id >> 6) & 0x1F);
sw_id4 = (uint8_t)((can_id << 2) & 0xFC);

TCAN_WriteReg(TCAN_REG_SW_ID1, 0x00);
TCAN_WriteReg(TCAN_REG_SW_ID2, 0x00);
TCAN_WriteReg(TCAN_REG_SW_ID3, sw_id3);
TCAN_WriteReg(TCAN_REG_SW_ID4, sw_id4);
}
else
{
uint8_t id3 = (can_id >> 16) & 0xFF;
id3 |= (1 << 5);
TCAN_WriteReg(TCAN_REG_SW_ID1, (can_id >> 0) & 0xFF);
TCAN_WriteReg(TCAN_REG_SW_ID2, (can_id >> 8) & 0xFF);
TCAN_WriteReg(TCAN_REG_SW_ID3, id3);
TCAN_WriteReg(TCAN_REG_SW_ID4, (can_id >> 24) & 0xFF);
}

uint16_t std_mask = 0x000; // exact match

uint8_t mask4;
uint8_t mask_dlc_bits;

mask4 = (std_mask >> 3) & 0xFF;
mask_dlc_bits = (std_mask << 5) & 0xE0;

TCAN_WriteReg(TCAN_REG_SW_ID_MASK1, 0x00);
TCAN_WriteReg(TCAN_REG_SW_ID_MASK2, 0x00);
TCAN_WriteReg(TCAN_REG_SW_ID_MASK3, 0x00);
TCAN_WriteReg(TCAN_REG_SW_ID_MASK4, mask4);

wuf_cfg |= mask_dlc_bits;

if (dlc != 0xFF)
{
wuf_cfg |= ((dlc & 0x0F) << 1);
}

if (mask_enable && data_pattern != NULL)
{
wuf_cfg |= 0x01;
}

TCAN_WriteReg(TCAN_REG_SW_ID_MASK_DLC, wuf_cfg);

if (mask_enable && data_pattern != NULL)
{
for (i = 0; i < 8; i++)
{
TCAN_WriteReg(TCAN_REG_DATA0 + i, data_pattern[i]);
}
}

}

Could you also kindly review whether this overall sequence is correct for Partial Networking implementation?

Thanks & Regards,
Anil Kumar