Part Number: TCAN1146-Q1
INT_ENABLE_1 =0xFF
WD_CONFIG_1 =0x74
WD_CONFIG_2=0x20
FSM_CONFIG =0x0
INT_ENABLE_3 =0x80
Writtern WD_INPUT_TRIG to 0xFF once also tried twice
Still watchdog is not making pin go low
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Part Number: TCAN1146-Q1
INT_ENABLE_1 =0xFF
WD_CONFIG_1 =0x74
WD_CONFIG_2=0x20
FSM_CONFIG =0x0
INT_ENABLE_3 =0x80
Writtern WD_INPUT_TRIG to 0xFF once also tried twice
Still watchdog is not making pin go low
Hi Akshay,
First, please note that writing to INT_ENABLE_1 (or INT_ENABLE_3) does not disabled those functions. It only disables the interrupt mask.
Second, let me direct you to our Watchdog guide which might be helpful: https://www.ti.com/lit/ug/slla546/slla546.pdf
Have you also read through Section 10.4.7.7 in the datasheet? This explains how the WD error counter works. You currently have it setup so the it triggers on the 5th event.
Based on WD_ERR_CNT it seems that there are no errors present. So the transceiver will not take the WD action of setting INH low.
Best,
Ethan
one more thing similar way i tried within SBL code to add TCAN1146 code 
Here INH pin is going low
Hi Akshay,
Could you provide all the interrupt register values (INT_1, INT_2, INT_3, and INT_CANBUS)? I can see that the global output interrupt is F0, meaning there are multiple flags present.
I always recommend clearing all flags when an unknown issue is encountered.
Best,
Ethan
Hi Akshay,
First, I would recommend referring to our Watchdog guide: https://www.ti.com/lit/ug/slla546/slla546.pdf
What do you mean by SBL? What is the specific difference between the screenshots you shared?
In the failing screenshot, I can see that there are multiple errors present. Please clear each interrupt register. Additionally, I can see that in MOSI: A6 00 00 00, MISO gives F0 80 00 00. This is showing that INT_3 has a SPI error. Please double check that your SPI format matches Figure 10-37. If your question is about SPI data length, then yes, it should only be 2 bytes.
Please fix your SPI errors and clear all registers and reattempt your watchdog code.
Best,
Ethan
Can you tell what should be CPOL and CPHA
Also since I am using TI MCAL

Please confirm whether these settings are correct I am using AWr2943 as master
Hi Akshay,
I do not support that software. Please reference the SPI section in the datasheet, and if you have questions about the software, please reach out to the respective owner.
Best,
Ethan
Yes, that diagram showing CPOL=0, CPHA=0 is correct (i.e. SPI mode 0).
Looking at your SPI config, I would double check your SPICsMode is correct (currently it is set to continuous). CS should only go low for the 16/24/32 bits you send.