AM62P: Single-link LVDS configuration

Part Number: AM62P

The built-in k3-am62p5-sk-microtips-mf101hie-panel.dtso of the SDK can output signals normally. However, I am currently trying to configure a single-channel LVDS and it cannot output signals correctly.Configuration file content:

$ cat k3-am62p5-debix-t62p-01-td070a.dtso
 
/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

&{/} {
        display {
                compatible = "debix,td070a", "panel-simple";          
                /*
                 * Single-link LVDS configuration.
                 * Only OLDI TX 0 is used for single-link mode.
                 * OLDI TX 1 is not needed.
                 */
                //power-supply = <&vcc_3v3_sys>;
                port {
                        lcd_in0: endpoint {
                                remote-endpoint = <&oldi0_dss0_out>;
                        };
                };
        };
};

&dss0 {
        status = "okay";
};

&oldi0_dss0 {
        status = "okay"; 
        ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
};

&oldi1_dss0 {
        status = "disabled"; 
};

&oldi0_dss0_port0 {
        oldi0_dss0_in: endpoint {
                remote-endpoint = <&dss0_dpi0_out0>;
        };
};

&oldi0_dss0_port1 {
        oldi0_dss0_out: endpoint {
                remote-endpoint = <&lcd_in0>;
        };
};

&dss0_ports { 

        /* VP1: Output to OLDI */
        port { 
                dss0_dpi0_out0: endpoint { 
                        remote-endpoint = <&oldi0_dss0_in>;
                };
        };
};

Information about DSS during kernel startup:

[    0.384176] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
[    0.402799] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
[    8.255110] [drm] Initialized tidss 1.0.0 for 30200000.dss on minor 0
[    8.341380] tidss 30200000.dss: OLDI0: timeout waiting for OLDI reset done.
[    8.417129] tidss 30200000.dss: [drm] fb0: tidssdrmfb frame buffer device

The clk pin and data pin of LVDS have no waveform output.
How can I further debug it, please ?

  • Hi John,
    Which SDK version are you working with?
    What does kmsprint and kmstest show?

  • SDK  12_00_00_07_04 , yocto , kernel  version 6.18.13.

    root@am62pxx-evm:~# kmstest
    Could not get DRM master permission. Card already in use?
    root@am62pxx-evm:~# kmsprint
    Connector 0 (42) LVDS-1 (connected)
      Encoder 0 (41) NONE
        Crtc 0 (40) 1024x600@59.99 51.200 1024/110/100/110/- 600/13/9/13/- 60 (59.99) P|D
          Plane 0 (33) fb-id: 51 (crtcs: 0) 0,0 1024x600 -> 0,0 1024x600 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
            FB 51 1024x600 XR24
          Plane 1 (43) fb-id: 55 (crtcs: 0) 0,0 1024x568 -> 0,32 1024x568 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
            FB 55 1024x568 AR24
    root@am62pxx-evm:~# uname -a
    Linux am62pxx-evm 6.18.13-ti-00778-gc21449208550-dirty #1 SMP PREEMPT Thu Mar 26 20:21:19 UTC 2026 aarch64 GNU/Linux
    root@am62pxx-evm:~#
    

  • You'll need to run
    systemctl stop emptty
    before running
    kmstest.

    Also, please share the reg dump using the script: https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/dump_5F00_dss_5F00_regs.sh

  • kmstest

    root@am62pxx-evm:~# systemctl stop emptty
    root@am62pxx-evm:~# kmstest
    Connector 0/@42: LVDS-1
      Crtc 0/@40: 1024x600@59.99 51.200 1024/110/100/110/- 600/13/9/13/- 60 (59.99) P|D
      Plane 0/@33: 0,0-1024x600
        Fb 51 1024x600-XR24
    [  695.613631] tidss 30200000.dss: OLDI0: timeout waiting for OLDI reset done.
    press enter to exit
    
    

    dump_5F00_dss_5F00_regs.sh

    ###############
    # DSS0
    ###############
    
    # DSS_COMMON (DSS0) (base: 0x30200000)
    30200004: 0x64040901
    30200008: 0x00000011
    30200020: 0x00000007
    30200024: 0x00000000
    30200028: 0x00000032
    3020002c: 0x00000000
    30200030: 0x00000032
    30200040: 0x00000032
    30200044: 0x00000001
    30200048: 0x00000001
    30200058: 0x00000000
    3020005c: 0x00000000
    30200070: 0x00000000
    30200074: 0x00000011
    3020007c: 0x00000000
    30200080: 0x00000000
    30200090: 0x00000002
    30200094: 0x00000000
    30200098: 0x00004688
    3020009c: 0x00000001
    302000a0: 0x00000000
    302000a4: 0x00000000
    302000a8: 0x00000000
    302000ac: 0x00000000
    
    # DSS_COMMON1 (DSS0) (base: 0x30201000)
    30201024: 0x00000000
    30201028: 0x00000032
    3020102c: 0x00000000
    30201030: 0x00000000
    30201040: 0x00000000
    30201044: 0x00000000
    30201048: 0x00000000
    30201054: 0x00000000
    30201058: 0x00000000
    3020105c: 0x00000000
    30201070: 0x00000000
    30201074: 0x00000000
    3020107c: 0x00000000
    30201080: 0x00000000
    
    # DSS_VIDL1 (DSS0) (base: 0x30202000)
    30202020: 0x1000004f
    30202024: 0x3c000000
    30202028: 0xd8900000
    3020202c: 0xd8900000
    30202030: 0x00000000
    30202034: 0x00000000
    30202038: 0x00000a00
    3020203c: 0x09ff0500
    30202040: 0x00000000
    30202044: 0x00000000
    30202048: 0x00000000
    3020204c: 0x00000000
    30202050: 0x00000000
    30202054: 0x00000000
    30202058: 0x00000000
    302021fc: 0x000000ff
    30202208: 0x06aa0355
    3020220c: 0x025703ff
    30202210: 0x00000001
    30202218: 0x00000500
    3020221c: 0x00000001
    3020222c: 0x00000000
    30202230: 0x00000000
    30202234: 0x00000000
    30202238: 0x00000000
    3020223c: 0x00000000
    30202248: 0x00000001
    30202260: 0x00000000
    30202264: 0x00000000
    30202268: 0x00000000
    3020226c: 0x00000000
    30202270: 0x00000000
    30202274: 0x00000000
    30202278: 0x00000000
    3020227c: 0x00000000
    30202280: 0x00000000
    30202284: 0x00000000
    30202288: 0x00000000
    3020228c: 0x00000000
    30202290: 0x00000000
    30202294: 0x00000000
    30202298: 0x00000000
    3020229c: 0x00000000
    302022a0: 0x00000000
    302022a4: 0x00000000
    302022a8: 0x00000000
    302022ac: 0x00000000
    302022b0: 0x00000000
    302022b4: 0x00000000
    302022b8: 0x00000000
    
    # DSS_VID (DSS0) (base: 0x30206000)
    30206000: 0x00000000
    30206004: 0x00000000
    30206008: 0x00000000
    3020600c: 0x00000000
    30206010: 0x00000000
    30206014: 0x00000000
    30206018: 0x00000000
    3020601c: 0x00000000
    30206020: 0x1000000e
    30206024: 0x3c000000
    30206028: 0xd9200000
    3020602c: 0xd9200000
    30206030: 0x00000000
    30206034: 0x00000000
    30206038: 0x00000a00
    3020603c: 0x09ff0500
    30206040: 0x00000000
    30206044: 0x00000000
    30206048: 0x00000000
    3020604c: 0x00000000
    30206050: 0x00000000
    30206054: 0x00000000
    30206058: 0x00000000
    3020605c: 0x00200000
    30206060: 0x00200000
    30206064: 0x00200000
    30206068: 0x00200000
    3020606c: 0x00000000
    30206070: 0x00000000
    30206074: 0x00000000
    30206078: 0x00000000
    3020607c: 0x00000000
    30206080: 0x00000000
    30206084: 0x00000000
    30206088: 0x00000000
    3020608c: 0x00000000
    30206090: 0x00000000
    30206094: 0x00000000
    30206098: 0x00000000
    3020609c: 0x00000000
    302060a0: 0x00000000
    302060a4: 0x00000000
    302060a8: 0x00000000
    302060ac: 0x00000000
    302060b0: 0x00000000
    302060b4: 0x00000000
    302060b8: 0x00000000
    302060bc: 0x00000000
    302060c0: 0x00000000
    302060c4: 0x00000000
    302060c8: 0x00000000
    302060cc: 0x00000000
    302060d0: 0x00000000
    302060d4: 0x00000000
    302060d8: 0x00000000
    302060dc: 0x00000000
    302060e0: 0x00000000
    302060e4: 0x00000000
    302060e8: 0x00000000
    302060ec: 0x00000000
    302060f0: 0x00000000
    302060f4: 0x00000000
    302060f8: 0x00000000
    302060fc: 0x00000000
    30206100: 0x00000000
    30206104: 0x00000000
    30206108: 0x00000000
    3020610c: 0x00000000
    30206110: 0x00000000
    30206114: 0x00000000
    30206118: 0x00000000
    3020611c: 0x00000000
    30206120: 0x00000000
    30206124: 0x00000000
    30206128: 0x00000000
    3020612c: 0x00000000
    30206130: 0x00000000
    30206134: 0x00000000
    30206138: 0x00000000
    3020613c: 0x00000000
    30206140: 0x00000000
    30206144: 0x00000000
    30206148: 0x00000000
    3020614c: 0x00000000
    30206150: 0x00000000
    30206154: 0x00000000
    30206158: 0x00000000
    3020615c: 0x00000000
    30206160: 0x00000000
    30206164: 0x00000000
    30206168: 0x00000000
    3020616c: 0x00000000
    30206170: 0x00000000
    30206174: 0x00000000
    30206178: 0x00000000
    3020617c: 0x00000000
    30206180: 0x00000000
    30206184: 0x00000000
    30206188: 0x00000000
    3020618c: 0x00000000
    30206190: 0x00000000
    30206194: 0x00000000
    30206198: 0x00000000
    3020619c: 0x00000000
    302061a0: 0x00000000
    302061a4: 0x00000000
    302061a8: 0x00000000
    302061ac: 0x00000000
    302061b0: 0x00000000
    302061b4: 0x00000000
    302061b8: 0x00000000
    302061bc: 0x00000000
    302061c0: 0x00000000
    302061c4: 0x00000000
    302061c8: 0x00000000
    302061cc: 0x00000000
    302061d0: 0x00000000
    302061d4: 0x00000000
    302061d8: 0x00000000
    302061dc: 0x00000000
    302061e0: 0x00000000
    302061e4: 0x00000000
    302061e8: 0x00000000
    302061ec: 0x00000000
    302061f0: 0x00000000
    302061f4: 0x00000000
    302061f8: 0x00000000
    302061fc: 0x000000ff
    30206208: 0x06aa0355
    3020620c: 0x023703ff
    30206210: 0x00000001
    30206218: 0x00000500
    3020621c: 0x00000001
    30206220: 0x023703ff
    3020622c: 0x00000000
    30206230: 0x00000000
    30206234: 0x00000000
    30206238: 0x00000000
    3020623c: 0x00000000
    30206248: 0x00000001
    30206260: 0x00000000
    30206264: 0x00000000
    30206268: 0x00000000
    3020626c: 0x00000000
    30206270: 0x00000000
    30206274: 0x00000000
    30206278: 0x00000000
    3020627c: 0x00000000
    30206280: 0x00000000
    30206284: 0x00000000
    30206288: 0x00000000
    3020628c: 0x00000000
    30206290: 0x00000000
    30206294: 0x00000000
    30206298: 0x00000000
    3020629c: 0x00000000
    302062a0: 0x00000000
    302062a4: 0x00000000
    302062a8: 0x00000000
    302062ac: 0x00000000
    302062b0: 0x00000000
    302062b4: 0x00000000
    302062b8: 0x00000000
    
    # DSS_OVR1 (DSS0) (base: 0x30207000)
    30207000: 0x00000000
    30207008: 0x00000000
    3020700c: 0x00000000
    30207010: 0x00000000
    30207014: 0x00000000
    30207018: 0x00000000
    3020701c: 0x00000000
    30207020: 0x00000000
    30207024: 0x00000000
    30207028: 0x00000000
    3020702c: 0x00000000
    
    # DSS_OVR2 (DSS0) (base: 0x30208000)
    30208000: 0x00000000
    30208008: 0x00000000
    3020800c: 0x00000000
    30208010: 0x00000000
    30208014: 0x00000000
    30208018: 0x00000000
    3020801c: 0x00000000
    30208020: 0x00000003
    30208024: 0x01000000
    30208028: 0x00000000
    3020802c: 0x00000000
    
    # DSS_VP1 (DSS0) (base: 0x3020A000)
    3020a000: 0x00000004
    3020a004: 0x00000040
    3020a008: 0x00000000
    3020a00c: 0x00000000
    3020a010: 0x00000000
    3020a014: 0x00000000
    3020a018: 0x00000000
    3020a01c: 0x00000000
    3020a044: 0x00000000
    3020a04c: 0x00000000
    3020a050: 0x00000000
    3020a054: 0x00000000
    3020a058: 0x00000000
    3020a05c: 0x00000000
    3020a060: 0x00000000
    3020a064: 0x00000000
    3020a068: 0x00000000
    3020a06c: 0x00000000
    3020a070: 0x00000000
    3020a074: 0x00000000
    3020a078: 0x00000000
    3020a07c: 0x00000000
    3020a090: 0x00000000
    3020a094: 0x00000000
    3020a098: 0x00000000
    3020a09c: 0x00000000
    3020a0b0: 0x00000000
    3020a0b4: 0x00000000
    3020a0b8: 0x00000000
    3020a0bc: 0x00000000
    3020a0d0: 0x00000000
    3020a0d4: 0x00000000
    3020a0d8: 0x00000000
    3020a0dc: 0x00000000
    3020a0f0: 0x00000000
    3020a0f4: 0x00000000
    3020a0f8: 0x00000000
    3020a0fc: 0x00000000
    3020a110: 0x00000000
    3020a120: 0x00000000
    3020a124: 0x00000000
    3020a128: 0x00000000
    3020a12c: 0x00000000
    3020a130: 0x00000000
    3020a134: 0x00000000
    3020a138: 0x00000000
    3020a13c: 0x00000000
    3020a140: 0x00000000
    3020a144: 0x00000000
    3020a148: 0x00000000
    3020a14c: 0x00000000
    3020a150: 0x00000000
    3020a154: 0x00000000
    3020a158: 0x00000000
    3020a15c: 0x00000000
    3020a160: 0x00000000
    3020a164: 0x68f04900
    3020a168: 0x00000000
    
    # DSS_VP2 (DSS0) (base: 0x3020B000)
    3020b000: 0x00000004
    3020b004: 0x00000241
    3020b008: 0x00000000
    3020b00c: 0x00000000
    3020b010: 0x00000000
    3020b014: 0x00000000
    3020b018: 0x00000000
    3020b01c: 0x00000000
    3020b044: 0x00000000
    3020b04c: 0x00063000
    3020b050: 0x025703ff
    3020b054: 0x06d06d63
    3020b058: 0x00d00d08
    3020b05c: 0x00000000
    3020b060: 0x00000000
    3020b064: 0x00000000
    3020b068: 0x00000000
    3020b06c: 0x00000000
    3020b070: 0x00000000
    3020b074: 0x00000000
    3020b078: 0x00000000
    3020b07c: 0x00000000
    3020b090: 0x00000000
    3020b094: 0x00000000
    3020b098: 0x00000000
    3020b09c: 0x00000000
    3020b0b0: 0x00000000
    3020b0b4: 0x00000000
    3020b0b8: 0x00000000
    3020b0bc: 0x00000000
    3020b0d0: 0x00000000
    3020b0d4: 0x00000000
    3020b0d8: 0x00000000
    3020b0dc: 0x00000000
    3020b0f0: 0x00000000
    3020b0f4: 0x00000000
    3020b0f8: 0x00000000
    3020b0fc: 0x00000000
    3020b110: 0x00000000
    3020b120: 0x00000000
    3020b124: 0x00000000
    3020b128: 0x00000000
    3020b12c: 0x00000000
    3020b130: 0x00000000
    3020b134: 0x00000000
    3020b138: 0x00000000
    3020b13c: 0x00000000
    3020b140: 0x00000000
    3020b144: 0x00000000
    3020b148: 0x00000000
    3020b14c: 0x00000000
    3020b150: 0x00000000
    3020b154: 0x00000000
    3020b158: 0x00000000
    3020b15c: 0x00000000
    3020b160: 0x00001081
    3020b164: 0x00000000
    3020b168: 0x00000000
    
    

  • Hi John,
    Can you share all the changes on your kernel side?
    I do not see this compatible in panel-simple by default: debix,td070a, indicating that you have added it at your end.
    Can you check replacing with this compatible: rocktech,rk101ii01d-ct and see whether you see any signals on probe?

  • I have tried using compatible = "multi-inno,mi1010z1t-1cp11", "panel-simple"; the output at 1024x600 also encounters the same issue, with no waveform output.

  • Configured as rocktech, rk101ii01d-ct, with a resolution of 1280x800, there is still no signal output.

    • root@am62pxx-evm:~# kmsprint
      Connector 0 (42) LVDS-1 (connected)
        Encoder 0 (41) NONE
          Crtc 0 (40) 1280x800@59.99 71.100 1280/48/32/80/? 800/2/5/16/? 60 (59.99) P|D
            Plane 0 (33) fb-id: 53 (crtcs: 0) 0,0 1280x800 -> 0,0 1280x800 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
              FB 53 1280x800 XR24
            Plane 1 (43) fb-id: 55 (crtcs: 0) 0,0 1280x768 -> 0,32 1280x768 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
              FB 55 1280x768 AR24
      root@am62pxx-evm:~# systemctl stop emptty
      root@am62pxx-evm:~# kmstest
      Connector 0/@42: LVDS-1
        Crtc 0/@40: 1280x800@59.99 71.100 1280/48/32/80/? 800/2/5/16/? 60 (59.99) P|D
        Plane 0/@33: 0,0-1280x800
          Fb 51 1280x800-XR24
      [   70.511619] tidss 30200000.dss: OLDI0: timeout waiting for OLDI reset done.
      press enter to exit
      
  • If I use name_overlays=ti/k3-am62p5-sk-microtips-mf101hie-panel.dtbo, LVDS has signal output.  

    root@am62pxx-evm:~# kmsprint
    Connector 0 (42) LVDS-1 (connected)
      Encoder 0 (41) NONE
        Crtc 0 (40) 1920x1200@60.00 150.275 1920/32/52/24/? 1200/24/8/3/? 60 (60.00) P|D
          Plane 0 (33) fb-id: 53 (crtcs: 0) 0,0 1920x1200 -> 0,0 1920x1200 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
            FB 53 1920x1200 XR24
          Plane 1 (43) fb-id: 54 (crtcs: 0) 0,0 1920x1168 -> 0,32 1920x1168 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
            FB 54 1920x1168 AR24
    root@am62pxx-evm:~# kmstest
    Could not get DRM master permission. Card already in use?
    root@am62pxx-evm:~# systemctl stop emptty
    root@am62pxx-evm:~# kmstest
    Connector 0/@42: LVDS-1
      Crtc 0/@40: 1920x1200@60.00 150.275 1920/32/52/24/? 1200/24/8/3/? 60 (60.00) P|D
      Plane 0/@33: 0,0-1920x1200
        Fb 51 1920x1200-XR24
    press enter to exit
    

  • Hi John, 
    With the Rocktech compatible, I see the following:

    root@am62pxx-evm:~# kmsprint
    Connector 0 (42) LVDS-1 (connected)
      Encoder 0 (41) NONE
        Crtc 0 (40) 1280x800@59.99 71.100 1280/48/32/80/? 800/2/5/16/? 60 (59.99) P|D
          Plane 0 (33) fb-id: 54 (crtcs: 0 1) 0,0 1280x800 -> 0,0 1280x800 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
            FB 54 1280x800 XR24
    Connector 1 (52) HDMI-A-1 (disconnected)
      Encoder 1 (51) NONE
    root@am62pxx-evm:~#
    root@am62pxx-evm:~#
    root@am62pxx-evm:~# devmem2 0x3020a160
    /dev/mem opened.
    Memory mapped at address 0xffffa8e5c000.
    Read at address  0x3020A160 (0xffffa8e5c160): 0x00001185
    root@am62pxx-evm:~#
    root@am62pxx-evm:~# dmesg | grep dss
    [    0.391061] /bus@f0000/i2c@20010000/bridge-hdmi@3b: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    0.413732] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/i2c@20010000/bridge-hdmi@3b
    [    0.423603] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/dss@30200000/oldi-transmitters/oldi@0
    [    0.434373] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
    [    0.443915] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    0.473486] /bus@f0000/i2c@20010000/bridge-hdmi@3b: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    0.499282] /bus@f0000/i2c@20010000/bridge-hdmi@3b: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    0.509240] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/i2c@20010000/bridge-hdmi@3b
    [    0.519113] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/dss@30200000/oldi-transmitters/oldi@0
    [    0.529884] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
    [    0.539371] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    1.299278] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/i2c@20010000/bridge-hdmi@3b
    [    1.318440] /bus@f0000/i2c@20010000/bridge-hdmi@3b: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    8.771651] [drm] Initialized tidss 1.0.0 for 30200000.dss on minor 0
    [    9.091297] tidss 30200000.dss: [drm] fb0: tidssdrmfb frame buffer device
    root@am62pxx-evm:~# dmesg | grep oldi
    [    0.423603] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/dss@30200000/oldi-transmitters/oldi@0
    [    0.434373] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
    [    0.443915] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    [    0.519113] /bus@f0000/dss@30200000: Fixed dependency cycle(s) with /bus@f0000/dss@30200000/oldi-transmitters/oldi@0
    [    0.529884] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /display
    [    0.539371] /bus@f0000/dss@30200000/oldi-transmitters/oldi@0: Fixed dependency cycle(s) with /bus@f0000/dss@30200000
    root@am62pxx-evm:~#
    root@am62pxx-evm:~#
    root@am62pxx-evm:~# uname -a
    Linux am62pxx-evm 6.18.13-00797-g4495407cc08e #32 SMP PREEMPT Fri May 15 16:09:26 IST 2026 aarch64 GNU/Linux
    root@am62pxx-evm:~#

    I expect the register 0x3020a160 to have some value, while it was 0 for you. Can you please recheck your setup, as well as share all kernel changes?

  • I only added one dts and one dtso file to my kernel。

    tisdk@polyhex:/home/gaoliang/workstation/TI/ti-linux-kernel
    $ git log
    commit 06b7fb4183ac536f33c6dd229d8caf8364cb4af1 (HEAD -> y6.18.13-12.00.00.07-debix-t62p-01, origin/y6.18.13-12.00.00.07-debix-t62p-01)
    Author: John_gao <john@polyhex.net>
    Date:   Fri May 15 02:32:44 2026 +0000
    
        add k3-am62p5-debix-t62p-01.dts
        set ddr to 2GB
        Modify sd mmc1 en gpio
    
    commit f19a4ba2d025938a29742f0cce6aa3425b54eebb (origin/ti-linux-6.18.y-12.00.00.07, origin/HEAD, ti-linux-6.18.y-12.00.00.07)
    Author: cloudesteem <rd@cloudesteem.cn>
    Date:   Thu May 14 09:53:22 2026 +0000
    
         update to 12.00.00.07 yocto 6.18.13
    
    commit c214492085504176b9c252a7175e4e60b4b442af (origin/master)
    Author: Sabeeh Khan <sabeeh-khan@ti.com>
    Date:   Thu Mar 26 14:02:52 2026 -0500
    
        TI: HACK: drivers: bluetooth: btti_uart: remove serdev_set_rts troublesome functions
    
    tisdk@polyhex:/home/gaoliang/workstation/TI/ti-linux-kernel
    $ git diff f19a4ba2d025938a29742f0cce6aa3425b54eebb 06b7fb4183ac536f33c6dd229d8caf8364cb4af1 --name-only
    arch/arm64/boot/dts/ti/Makefile
    arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01.dts
    gl_build.sh
    tisdk@polyhex:/home/gaoliang/workstation/TI/ti-linux-kernel
    $ git status
    On branch y6.18.13-12.00.00.07-debix-t62p-01
    Changes not staged for commit:
      (use "git add <file>..." to update what will be committed)
      (use "git restore <file>..." to discard changes in working directory)
            modified:   arch/arm64/boot/dts/ti/Makefile
            modified:   arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01.dts 
            modified:   gl_build.sh
    
    Untracked files:
      (use "git add <file>..." to include in what will be committed)
            arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01-td070a.dtso
             
    
    no changes added to commit (use "git add" and/or "git commit -a")
    

    arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01.dts   -> Modify use 2G ddr,  Modify emmc1 en gpio 

    $ cat arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01.dts
    // SPDX-License-Identifier: GPL-2.0-only OR MIT
    /*
     * Device Tree file for the AM62P5-SK
     * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
     *
     * Schematics: https://www.ti.com/lit/zip/sprr487
     */
    
    /dts-v1/;
    
    #include <dt-bindings/leds/common.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include "k3-am62p5.dtsi"
    
    #include "k3-timesync-router.h"
    
    / {
            compatible = "ti,am62p5-sk", "ti,am62p5";
            model = "Texas Instruments AM62P5 SK";
    
            aliases {
                    serial0 = &wkup_uart0;
                    serial1 = &mcu_uart0;
                    serial2 = &main_uart0;
                    serial3 = &main_uart1;
                    mmc0 = &sdhci0;
                    mmc1 = &sdhci1;
                    mmc2 = &sdhci2;
                    spi0 = &ospi0;
                    ethernet0 = &cpsw_port1;
                    ethernet1 = &cpsw_port2;
                    usb0 = &usb0;
                    usb1 = &usb1;
            };
    
            chosen {
                    #address-cells = <2>;
                    #size-cells = <2>;
                    ranges;
    
                    stdout-path = &main_uart0;
    
                    framebuffer0: framebuffer@0 {
                            compatible = "simple-framebuffer";
                            power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
                            clocks = <&k3_clks 186 6>,
                                     <&dss0_vp1_clk>,
                                     <&k3_clks 186 2>;
                            display = <&dss0>;
                            status = "disabled";
                    };
            };
    
            memory@80000000 {
    #if 0
                    /* 8G RAM */
                    reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
                          <0x00000008 0x80000000 0x00000001 0x80000000>;
    #else
                    /* 2G RAM */
                    reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
    #endif
                    device_type = "memory";
                    bootph-pre-ram;
            };
    
            reserved_memory: reserved-memory {
                    #address-cells = <2>;
                    #size-cells = <2>;
                    ranges;
    
                    wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {
                            compatible = "shared-dma-pool";
                            reg = <0x00 0x9c800000 0x00 0x100000>;
                            no-map;
                    };
    
                    wkup_r5fss0_core0_memory_region: memory@9c900000 {
                            compatible = "shared-dma-pool";
                            reg = <0x00 0x9c900000 0x00 0xf00000>;
                            no-map;
                    };
    
                    linux,cma {
                            compatible = "shared-dma-pool";
                            reusable;
                            size = <0x00 0x24000000>;
                            linux,cma-default;
                    };
    
                    secure_tfa_ddr: tfa@9e780000 {
                            reg = <0x00 0x9e780000 0x00 0x80000>;
                            no-map;
                    };
    
                    secure_ddr: optee@9e800000 {
                            reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
                            no-map;
                    };
            };
    
            vmain_pd: regulator-0 {
                    /* TPS65988 PD CONTROLLER OUTPUT */
                    compatible = "regulator-fixed";
                    regulator-name = "vmain_pd";
                    regulator-min-microvolt = <5000000>;
                    regulator-max-microvolt = <5000000>;
                    regulator-always-on;
                    regulator-boot-on;
                    bootph-all;
            };
    
            vcc_5v0: regulator-1 {
                    /* Output of TPS630702RNMR */
                    compatible = "regulator-fixed";
                    regulator-name = "vcc_5v0";
                    regulator-min-microvolt = <5000000>;
                    regulator-max-microvolt = <5000000>;
                    vin-supply = <&vmain_pd>;
                    regulator-always-on;
                    regulator-boot-on;
                    bootph-all;
            };
    
            vdd_mmc1: regulator-2 {
                    /* TPS22918DBVR */
                    compatible = "regulator-fixed";
                    regulator-name = "vdd_mmc1";
                    regulator-min-microvolt = <3300000>;
                    regulator-max-microvolt = <3300000>;
                    regulator-boot-on;
                    enable-active-high;
                    //gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
                    pinctrl-names = "default";
                    pinctrl-0 = <&vdd_sd_pins_default>;
                    gpios = <&main_gpio0 39 GPIO_ACTIVE_HIGH>;
                    bootph-all;
            };
    
            vddshv_sdio: regulator-3 {
                    compatible = "regulator-gpio";
                    regulator-name = "vddshv_sdio";
                    pinctrl-names = "default";
                    pinctrl-0 = <&vddshv_sdio_pins_default>;
                    regulator-min-microvolt = <1800000>;
                    regulator-max-microvolt = <3300000>;
                    regulator-boot-on;
                    gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
                    states = <1800000 0x0>,
                             <3300000 0x1>;
                    bootph-all;
            };
    
            vcc_3v3_main: regulator-4 {
                    /* output of LM5141-Q1 */
                    compatible = "regulator-fixed";
                    regulator-name = "vcc_3v3_main";
                    regulator-min-microvolt = <3300000>;
                    regulator-max-microvolt = <3300000>;
                    vin-supply = <&vmain_pd>;
                    regulator-always-on;
                    regulator-boot-on;
            };
    
            vcc_3v3_sys: regulator-5 {
                    /* output of TPS222965DSGT */
                    compatible = "regulator-fixed";
                    regulator-name = "vcc_3v3_sys";
                    regulator-min-microvolt = <3300000>;
                    regulator-max-microvolt = <3300000>;
                    vin-supply = <&vcc_3v3_main>;
                    regulator-always-on;
                    regulator-boot-on;
            };
    
            leds {
                    compatible = "gpio-leds";
                    pinctrl-names = "default";
                    pinctrl-0 = <&usr_led_pins_default>;
    
                    led-0 {
                            label = "am62-sk:green:heartbeat";
                            gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
                            linux,default-trigger = "heartbeat";
                            function = LED_FUNCTION_HEARTBEAT;
                            default-state = "off";
                    };
            };
    
            opp-table {
                    /* Requires VDD_CORE at 0v85 */
                    opp-1400000000 {
                            opp-hz = /bits/ 64 <1400000000>;
                            opp-supported-hw = <0x01 0x0004>;
                            clock-latency-ns = <6000000>;
                    };
            };
    
            tlv320_mclk: clk-0 {
                    #clock-cells = <0>;
                    compatible = "fixed-clock";
                    clock-frequency = <12288000>;
            };
    
            codec_audio: sound {
                    compatible = "simple-audio-card";
                    simple-audio-card,name = "AM62x-SKEVM";
                    simple-audio-card,widgets =
                            "Headphone",    "Headphone Jack",
                            "Line",         "Line In",
                            "Microphone",   "Microphone Jack";
                    simple-audio-card,routing =
                            "Headphone Jack",       "HPLOUT",
                            "Headphone Jack",       "HPROUT",
                            "LINE1L",               "Line In",
                            "LINE1R",               "Line In",
                            "MIC3R",                "Microphone Jack",
                            "Microphone Jack",      "Mic Bias";
                    simple-audio-card,format = "dsp_b";
                    simple-audio-card,bitclock-master = <&sound_master>;
                    simple-audio-card,frame-master = <&sound_master>;
                    simple-audio-card,bitclock-inversion;
    
                    simple-audio-card,cpu {
                            sound-dai = <&mcasp1>;
                    };
    
                    sound_master: simple-audio-card,codec {
                            sound-dai = <&tlv320aic3106>;
                            clocks = <&tlv320_mclk>;
                    };
            };
    
            hdmi0: connector-hdmi {
                    status = "disabled";
                    compatible = "hdmi-connector";
                    label = "hdmi";
                    type = "a";
                    port {
                            hdmi_connector_in: endpoint {
                                    remote-endpoint = <&sii9022_out>;
                            };
                    };
            };
    };
    
    &cpsw_mac_syscon {
            bootph-all;
    };
    
    &phy_gmii_sel {
            bootph-all;
    };
    
    &main_gpio0 {
            bootph-all;
    };
    
    &main_gpio1 {
            bootph-all;
    };
    
    &main_pmx0 {
            bootph-all;
    
            main_i2c0_pins_default: main-i2c0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */
                            AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */
                    >;
            };
    
            main_i2c1_pins_default: main-i2c1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
                            AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */
                    >;
                    bootph-all;
            };
    
            main_i2c2_pins_default: main-i2c2-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */
                            AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */
                    >;
            };
    
            main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C22) UART0_RTSn.GPIO1_23 */
                    >;
            };
    
            main_mcasp1_pins_default: main-mcasp1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */
                            AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */
                            AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */
                            AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */
                    >;
            };
    
            main_mdio1_pins_default: main-mdio1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
                            AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
                    >;
                    bootph-all;
            };
    
            main_mmc1_pins_default: main-mmc1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */
                            AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */
                            AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */
                            AM62PX_IOPAD(0x022c, PIN_INPUT, 0) /* (H23) MMC1_DAT1 */
                            AM62PX_IOPAD(0x0228, PIN_INPUT, 0) /* (H22) MMC1_DAT2 */
                            AM62PX_IOPAD(0x0224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */
                            AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */
                    >;
                    bootph-all;
            };
    
            main_mmc2_pins_default: main-mmc2-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */
                            AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */
                            AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */
                            AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */
                            AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */
                            AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */
                            AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */
                    >;
                    bootph-all;
            };
    
            main_rgmii1_pins_default: main-rgmii1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */
                            AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */
                            AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */
                            AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */
                            AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */
                            AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */
                            AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */
                            AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */
                            AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */
                            AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */
                            AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */
                            AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */
                    >;
                    bootph-all;
            };
    
            main_rgmii2_pins_default: main-rgmii2-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */
                            AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */
                            AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */
                            AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */
                            AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */
                            AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */
                            AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */
                            AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */
                            AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */
                            AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */
                            AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC */
                            AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */
                    >;
                    bootph-all;
            };
    
            main_uart0_pins_default: main-uart0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x1c8, PIN_INPUT, 0)       /* (A22) UART0_RXD */
                            AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0)      /* (B22) UART0_TXD */
                    >;
                    bootph-all;
            };
    
            main_uart0_pins_wakeup: main-uart0-wakeup-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x1c8, PIN_INPUT | PIN_WKUP_EN, 0) /* (A22) UART0_RXD */
                            AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0)      /* (B22) UART0_TXD */
                    >;
            };
    
            main_uart1_pins_default: main-uart1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */
                            AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */
                            AM62PX_IOPAD(0x01ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR.UART1_RXD */
                            AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
                    >;
                    bootph-all;
            };
    
            main_usb0_pins_default: main-usb0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0254, PIN_INPUT, 7) /* (G22) USB0_DRVVBUS.GPIO1_50 */
                    >;
            };
            main_usb1_pins_default: main-usb1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
                    >;
            };
    
    
    
            main_wlirq_pins_default: main-wlirq-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
                    >;
            };
    
            ospi0_pins_default: ospi0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */
                            AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */
                            AM62PX_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */
                            AM62PX_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */
                            AM62PX_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */
                            AM62PX_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */
                            AM62PX_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */
                            AM62PX_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */
                            AM62PX_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */
                            AM62PX_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */
                            AM62PX_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */
                    >;
                    bootph-all;
            };
    
            usr_led_pins_default: usr-led-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */
                    >;
            };
    
            vddshv_sdio_pins_default: vddshvr-sdio-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */
                    >;
                    bootph-all;
            };
            vdd_sd_pins_default: vdd-sd-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x00a0, PIN_OUTPUT, 7) /* (P24) GPMC0_WPn.GPIO0_39 */
                    >;
                    bootph-all;
            };
    
    
    
            wlan_en_pins_default: wlan-en-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
                    >;
            };
    
            main_ecap1_pins_default: main-ecap1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x019c, PIN_OUTPUT, 2) /* (E24) MCASP0_AXR1.ECAP1_IN_APWM_OUT */
                    >;
            };
    
            main_ecap2_pins_default: main-ecap2-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (F24) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */
                    >;
            };
    
            main_epwm0_pins_default: main-epwm0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (D20) SPI0_CS0.EHRPWM0_A */
                            AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (E20) SPI0_CS1.EHRPWM0_B */
                    >;
            };
    
            main_epwm1_pins_default: main-epwm1-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (B21) SPI0_CLK.EHRPWM1_A */
                            AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (B20) SPI0_D0.EHRPWM1_B */
                    >;
            };
    
            main_dpi_pins_default: main-dpi-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_IOPAD(0x0100, PIN_OUTPUT, 0) /* (W20) VOUT0_VSYNC */
                            AM62PX_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AC20) VOUT0_HSYNC */
                            AM62PX_IOPAD(0x0104, PIN_OUTPUT, 0) /* (Y21) VOUT0_PCLK */
                            AM62PX_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (W21) VOUT0_DE */
                            AM62PX_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (AE24) VOUT0_DATA0 */
                            AM62PX_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA1 */
                            AM62PX_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA2 */
                            AM62PX_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA3 */
                            AM62PX_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (AB23) VOUT0_DATA4 */
                            AM62PX_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (AD23) VOUT0_DATA5 */
                            AM62PX_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (AC23) VOUT0_DATA6 */
                            AM62PX_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AE23) VOUT0_DATA7 */
                            AM62PX_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AE22) VOUT0_DATA8 */
                            AM62PX_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AC22) VOUT0_DATA9 */
                            AM62PX_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */
                            AM62PX_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AE21) VOUT0_DATA11 */
                            AM62PX_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AD21) VOUT0_DATA12 */
                            AM62PX_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AC21) VOUT0_DATA13 */
                            AM62PX_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AA20) VOUT0_DATA14 */
                            AM62PX_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (Y20) VOUT0_DATA15 */
                            AM62PX_IOPAD(0x005c, PIN_OUTPUT, 1) /* (AC25) GPMC0_AD8.VOUT0_DATA16 */
                            AM62PX_IOPAD(0x0060, PIN_OUTPUT, 1) /* (AB25) GPMC0_AD9.VOUT0_DATA17 */
                            AM62PX_IOPAD(0x0064, PIN_OUTPUT, 1) /* (AA25) GPMC0_AD10.VOUT0_DATA18 */
                            AM62PX_IOPAD(0x0068, PIN_OUTPUT, 1) /* (W24) GPMC0_AD11.VOUT0_DATA19 */
                            AM62PX_IOPAD(0x006c, PIN_OUTPUT, 1) /* (Y24) GPMC0_AD12.VOUT0_DATA20 */
                            AM62PX_IOPAD(0x0070, PIN_OUTPUT, 1) /* (AD25) GPMC0_AD13.VOUT0_DATA21 */
                            AM62PX_IOPAD(0x0074, PIN_OUTPUT, 1) /* (AB24) GPMC0_AD14.VOUT0_DATA22 */
                            AM62PX_IOPAD(0x0078, PIN_OUTPUT, 1) /* (AC24) GPMC0_AD15.VOUT0_DATA23 */
                            AM62PX_IOPAD(0x009c, PIN_OUTPUT, 1) /* (AD24) GPMC0_WAIT1.VOUT0_EXTPCLKIN */
                    >;
            };
    };
    
    &main_i2c0 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_i2c0_pins_default>;
            clock-frequency = <400000>;
    
    };
    
    &main_i2c1 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_i2c1_pins_default>;
            clock-frequency = <100000>;
            bootph-all;
    
            tlv320aic3106: audio-codec@1b {
                    status = "disabled";
                    #sound-dai-cells = <0>;
                    compatible = "ti,tlv320aic3106";
                    reg = <0x1b>;
                    ai3x-micbias-vg = <1>;  /* 2.0V */
            };
    
            exp1: gpio@22 {
                    compatible = "ti,tca6424";
                    status = "disabled";
                    reg = <0x22>;
                    gpio-controller;
                    #gpio-cells = <2>;
                    gpio-line-names = "OLDI_INT#", "x8_NAND_DETECT",
                                       "UART1_FET_SEL", "MMC1_SD_EN",
                                       "VPP_EN", "EXP_PS_3V3_EN",
                                       "UART1_FET_BUF_EN", "EXP_HAT_DETECT",
                                       "DSI_GPIO0", "DSI_GPIO1",
                                       "OLDI_EDID", "BT_UART_WAKE_SOC_3V3",
                                       "USB_TYPEA_OC_INDICATION", "CSI_GPIO0",
                                       "CSI_GPIO1", "WLAN_ALERTn",
                                       "HDMI_INTn", "TEST_GPIO2",
                                       "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
                                       "MCASP1_FET_SEL", "DSI_EDID",
                                       "PD_I2C_IRQ", "IO_EXP_TEST_LED";
    
                    interrupt-parent = <&main_gpio1>;
                    interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
                    interrupt-controller;
                    #interrupt-cells = <2>;
    
                    pinctrl-names = "default";
                    pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
                    bootph-all;
            };
            exp2: gpio@23 {
                    compatible = "ti,tca6424";
                    status = "disabled";
                    reg = <0x23>;
                    gpio-controller;
                    #gpio-cells = <2>;
                    gpio-line-names = "BT_EN_SOC", "EXP_PS_5V0_EN",
                                       "", "",
                                       "", "",
                                       "", "",
                                       "WL_LT_EN", "",
                                       "TP3", "TP6",
                                       "TP4", "TP7",
                                       "TP5", "TP8",
                                       "SoC_I2C2_MCAN_SEL", "GPIO_HDMI_RSTn",
                                       "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
                                       "GPIO_OLDI_RSTn", "GPIO_AUD_RSTn",
                                       "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST";
            };
    
            sii9022: bridge-hdmi@3b {
                    compatible = "sil,sii9022";
                    reg = <0x3b>;
                    interrupt-parent = <&exp1>;
                    interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
                    #sound-dai-cells = <0>;
                    sil,i2s-data-lanes = < 0 >;
                    status = "disabled";
    
                    hdmi_tx_ports: ports {
                            #address-cells = <1>;
                            #size-cells = <0>;
    
                            /*
                             * HDMI can be serviced with 3 potential VPs -
                             * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1).
                             * For now, we will service it with DSS0 VP1.
                             */
                            port@0 {
                                    reg = <0>;
    
                                    sii9022_in: endpoint {
                                            remote-endpoint = <&dss0_dpi1_out>;
                                    };
                            };
    
                            port@1 {
                                    reg = <1>;
    
                                    sii9022_out: endpoint {
                                            remote-endpoint = <&hdmi_connector_in>;
                                    };
                            };
                    };
            };
    
    };
    
    &main_i2c2 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_i2c2_pins_default>;
            clock-frequency = <400000>;
    };
    
    &sdhci0 {
            status = "okay";
            non-removable;
            ti,driver-strength-ohm = <50>;
            bootph-all;
    };
    
    &sdhci1 {
            /* SD/MMC */
            status = "okay";
            vmmc-supply = <&vdd_mmc1>;
            vqmmc-supply = <&vddshv_sdio>;
            pinctrl-names = "default";
            pinctrl-0 = <&main_mmc1_pins_default>;
            disable-wp;
            bootph-all;
    };
    
    &cpsw3g {
            pinctrl-names = "default";
            pinctrl-0 = <&main_rgmii1_pins_default>,
                        <&main_rgmii2_pins_default>;
            status = "okay";
    
            cpts@3d000 {
                    /* MAP HW3_TS_PUSH to GENF1 */
                    ti,pps = <2 1>;
            };
    };
    
    &cpsw_port1 {
            phy-mode = "rgmii-rxid";
            phy-handle = <&cpsw3g_phy0>;
            status = "okay";
            bootph-all;
    };
    
    &cpsw_port2 {
            phy-mode = "rgmii-rxid";
            phy-handle = <&cpsw3g_phy1>;
            status = "okay";
    };
    
    &cpsw3g_mdio {
            pinctrl-names = "default";
            pinctrl-0 = <&main_mdio1_pins_default>;
            status = "okay";
    
            cpsw3g_phy0: ethernet-phy@0 {
                    reg = <0>;
                    bootph-all;
                    //ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                    //ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                    //ti,min-output-impedance;
            };
    
            cpsw3g_phy1: ethernet-phy@1 {
                    reg = <1>;
                    //ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                    //ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                    //ti,min-output-impedance;
            };
    };
    
    &usbss0 {
            status = "okay";
            ti,vbus-divider;
    };
    
    &usbss1 {
            status = "okay";
            ti,vbus-divider;
    };
    
    &usb0 {
            //bootph-all;
            //usb-role-switch;
    
            dr_mode = "host";
            pinctrl-names = "default";
            pinctrl-0 = <&main_usb0_pins_default>;
    };
    
    &usb0_phy_ctrl {
            bootph-all;
    };
    
    &usb1 {
            dr_mode = "host";
            pinctrl-names = "default";
            pinctrl-0 = <&main_usb1_pins_default>;
    };
    
    &mcasp1 {
            status = "okay";
            #sound-dai-cells = <0>;
    
            pinctrl-names = "default";
            pinctrl-0 = <&main_mcasp1_pins_default>;
    
            op-mode = <0>;          /* MCASP_IIS_MODE */
            tdm-slots = <2>;
    
            serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
                   1 0 2 0
                   0 0 0 0
                   0 0 0 0
                   0 0 0 0
            >;
    };
    
    &fss {
            bootph-all;
    };
    
    &ospi0 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&ospi0_pins_default>;
            bootph-all;
    
            flash@0 {
                    compatible = "jedec,spi-nor";
                    reg = <0x0>;
                    spi-tx-bus-width = <8>;
                    spi-rx-bus-width = <8>;
                    spi-max-frequency = <166000000>;
                    cdns,tshsl-ns = <60>;
                    cdns,tsd2d-ns = <60>;
                    cdns,tchsh-ns = <60>;
                    cdns,tslch-ns = <60>;
                    cdns,read-delay = <4>;
                    bootph-all;
    
                    partitions {
                            compatible = "fixed-partitions";
                            #address-cells = <1>;
                            #size-cells = <1>;
                            bootph-all;
    
                            partition@0 {
                                    label = "ospi.tiboot3";
                                    reg = <0x00 0x80000>;
                            };
    
                            partition@80000 {
                                    label = "ospi.tispl";
                                    reg = <0x80000 0x200000>;
                            };
    
                            partition@280000 {
                                    label = "ospi.u-boot";
                                    reg = <0x280000 0x400000>;
                            };
    
                            partition@680000 {
                                    label = "ospi.env";
                                    reg = <0x680000 0x40000>;
                            };
    
                            partition@6c0000 {
                                    label = "ospi.env.backup";
                                    reg = <0x6c0000 0x40000>;
                            };
    
                            partition@800000 {
                                    label = "ospi.rootfs";
                                    reg = <0x800000 0x37c0000>;
                            };
    
                            partition@3fc0000 {
                                    label = "ospi.phypattern";
                                    reg = <0x3fc0000 0x40000>;
                                    bootph-all;
                            };
                    };
            };
    };
    
    &main_uart0 {
            pinctrl-names = "default", "wakeup";
            pinctrl-0 = <&main_uart0_pins_default>;
            pinctrl-1 = <&main_uart0_pins_wakeup>;
            wakeup-source = <&system_deep_sleep>,
                            <&system_mcu_only>,
                            <&system_standby>;
            status = "okay";
            bootph-all;
    };
    
    &main_uart1 {
            pinctrl-names = "default";
            pinctrl-0 = <&main_uart1_pins_default>;
            /* Main UART1 is used by TIFS firmware */
            status = "reserved";
            bootph-all;
    };
    
    &mcu_pmx0 {
            bootph-all;
    
            wkup_uart0_pins_default: wkup-uart0-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0)   /* (D8) WKUP_UART0_RXD */
                            AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0)  /* (D7) WKUP_UART0_TXD */
                    >;
                    bootph-all;
            };
    
            mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
                    >;
            };
    
            mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
                    >;
            };
    
            mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */
                    >;
            };
    
            mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
                    >;
            };
    
            mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
                    >;
            };
    
            mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins {
                    pinctrl-single,pins = <
                            AM62PX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */
                    >;
            };
    };
    
    &wkup_uart0 {
            /* WKUP UART0 is used by DM firmware */
            pinctrl-names = "default";
            pinctrl-0 = <&wkup_uart0_pins_default>;
            wakeup-source = <&system_io_ddr>,
                            <&system_deep_sleep>,
                            <&system_mcu_only>,
                            <&system_standby>;
            status = "reserved";
            bootph-all;
    };
    
    /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
    &mcu_gpio0 {
            status = "reserved";
    };
    
    &mcu_gpio_intr {
            status = "reserved";
    };
    
    &ecap1 {
            /* P36 of J4 */
            pinctrl-names = "default";
            pinctrl-0 = <&main_ecap1_pins_default>;
            status = "okay";
    };
    
    &ecap2 {
            /* P11 of J4 */
            pinctrl-names = "default";
            pinctrl-0 = <&main_ecap2_pins_default>;
            status = "okay";
    };
    
    &epwm0 {
            /* P24/P26 of J4 */
            pinctrl-names = "default";
            pinctrl-0 = <&main_epwm0_pins_default>;
            status = "okay";
    };
    
    &epwm1 {
            /* P23/P19 of J4 */
            pinctrl-names = "default";
            pinctrl-0 = <&main_epwm1_pins_default>;
            status = "okay";
    };
    
    &mcu_mcan0 {
            pinctrl-names = "default", "wakeup";
            pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>;
            pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>;
            wakeup-source = <&system_partial_io>,
                            <&system_io_ddr>,
                            <&system_deep_sleep>,
                            <&system_mcu_only>,
                            <&system_standby>;
    };
    
    &mcu_mcan1 {
            pinctrl-names = "default", "wakeup";
            pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>;
            pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>;
            wakeup-source = <&system_partial_io>,
                            <&system_io_ddr>,
                            <&system_deep_sleep>,
                            <&system_mcu_only>,
                            <&system_standby>;
    };
    
    &mcu_uart0 {
            wakeup-source = <&system_io_ddr>,
                            <&system_deep_sleep>,
                            <&system_mcu_only>,
                            <&system_standby>;
    };
    
    &dss_oldi_io_ctrl {
           bootph-all;
    };
    
    &dss0 {
            bootph-all;
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_dpi_pins_default>;
    };
    
    &dss0_ports {
            status = "disabled";
            /* DSS0-VP2: DPI/HDMI Output */
            port@1 {
                    reg = <1>;
    
                    dss0_dpi1_out: endpoint {
                            remote-endpoint = <&sii9022_in>;
                    };
            };
    };
    
    &timesync_router {
            /* Use Time Sync Router to map GENF1 input to HW3_TS_PUSH output */
            mux-reg-mask-val = <
                    /* pps [cpsw cpts genf1] in17 -> out12 [cpsw cpts hw3_push] */
                    K3_TS_OFFSET(12, 0x0001ffff, 17)
                    >;
            idle-states = <0x1>;
            status = "okay";
    };
    
    #include "k3-am62p-ti-ipc-firmware.dtsi"
    

    lvds   dtso

    $ cat arch/arm64/boot/dts/ti/k3-am62p5-debix-t62p-01-td070a.dtso
    // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
    /**
     * Microtips integrated OLDI panel (MF-101HIEBCAF0) and touch DT overlay for AM62P5-SK
     *
     * Panel datasheet: https://simplespec.microtipsusa.com/uploads/spec/datasheetFile/2588/13-101HIEBCAF0-S_V1.1_20221104.pdf
     *
     * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
     */
    
    /dts-v1/;
    /plugin/;
    
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    
    &{/} {
            display {
                    //compatible = "debix,td070a", "panel-simple";
                    //compatible = "multi-inno,mi1010z1t-1cp11", "panel-simple";
                    compatible = "rocktech,rk101ii01d-ct", "panel-simple";
                    //compatible = "microtips,mf-101hiebcaf0", "panel-simple";
                    /*
                     * Single-link LVDS configuration.
                     * Only OLDI TX 0 is used for single-link mode.
                     * OLDI TX 1 is not needed.
                     */
                    //power-supply = <&vcc_3v3_sys>;
                    port {
                            lcd_in0: endpoint {
                                    remote-endpoint = <&oldi0_dss0_out>;
                            };
                    };
            };
    };
    
    &dss0 {
            status = "okay";
    };
    
    &oldi0_dss0 {
            status = "okay";
            //ti,companion-oldi = <&oldi1_dss0>;
            ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
    };
    
    &oldi1_dss0 {
            status = "disabled";
    //      ti,secondary-oldi;
    //      ti,companion-oldi = <&oldi0_dss0>;
    };
    
    &oldi0_dss0_port0 {
            oldi0_dss0_in: endpoint {
                    remote-endpoint = <&dss0_dpi0_out0>;
            };
    };
    
    &oldi0_dss0_port1 {
            oldi0_dss0_out: endpoint {
                    remote-endpoint = <&lcd_in0>;
            };
    };
    
    &dss0_ports {
            status = "okay";
            //#address-cells = <1>;
            //#size-cells = <0>;
    
            /* VP1: Output to OLDI */
            port {
                    //reg = <0>;
                    //#address-cells = <1>;
                    //#size-cells = <0>;
    
                    dss0_dpi0_out0: endpoint {
                            //reg = <0>;
                            remote-endpoint = <&oldi0_dss0_in>;
                    };
    
            };
    };