TCAN4550: tcan4550 Overwrite and Blocking mode

Part Number: TCAN4550

Hi Team,

My customer uses TCAN4550 and sets RX0 FIFO to overwrite mode. Occasionally, they met errors in the messages transmitted from TCAN to the MCU via SPI. However, once the RX0 FIFO is set to blocking mode, this issue disappears.

So I would like to ask, when the TCAN RX0 FIFO is in overwrite mode and the FIFO buffer is full, will it overwrite the FIFO content that the MCU is currently reading? 

In addtion we found that the overwirte won't fully replace all eight bytes.

For example, The normal 8-byte valid data frame we receive is 0xFF 0xFF 0xFF 0x00 0xFF 0xFF 0xFF 0xFF. When operating in overwrite mode, the received frame becomes 0x25 0x00 0x01 0x00 0xFF 0xFF 0xFF 0xFF. It is unclear why the full FIFO only overwrites several bytes of the original data rather than fully updating all eight bytes in overwrite mode? Could you explain why?

 

Thanks,

Best regards,

Yang

 

  • Hi Yang,

    So I would like to ask, when the TCAN RX0 FIFO is in overwrite mode and the FIFO buffer is full, will it overwrite the FIFO content that the MCU is currently reading? 

    Please see section 3.4 of the MCAN User's Manual (Link) for detailed information on the RX Handling.

    Blocking and Overwrite modes refer to what happens when all of the RX Buffer Elements in the RX FIFO are full with new messages that have not been read or acknowledged by the MCU and a new RX message is received. 

    If the device is configured in Blocking Mode, the new message will not be stored because there are no empty buffer elements in the FIFO to store any new messages.

    If the device is configured in Overwrite Mode, the RX buffer Element in the FIFO that contains the Oldest message will be overwritten with the new RX message.

    In either case one of the two RX messages will be lost.

    In addtion we found that the overwirte won't fully replace all eight bytes.

    The amount of bytes written to a RX buffer element will depend on the amount of data in the new message that is set by the Data Length Code (DLC).  The number of data bytes allocated for a RX Buffer Element will depend on the configuration, but the maximum number possible is 64 data bytes.  If for example, each RX buffer element was configured to hold a message with 64 data bytes, and a message with only 8 bytes is received, then the device will only write 8 data bytes to the RX buffer element.  The remaining 56 data bytes in the element will retain whatever their previous value was and the device does not replace these bytes with a 0x00 value if they are not used.

    Each RX Buffer Element contains the message header information which contains the DLC code for that message.  When reading a message from the buffer, the MCU should only read the number of data bytes that match the value of the DLC code to ensure that only the data bytes associated with the message are returned.  Reading the full RX buffer element regardless of the DLC code may result in erroneous data bytes to be returned based on values set from previous messages stored in the RX Buffer Element.

    I will also note that the device only has 2k of MRAM and there is no error checking on the MRAM allocation of the TX/RX buffer elements, SID/XID Filter elements, TX Event FIFO elements, etc. If the total amount of memory allocated in the configuration exceeds the MRAM size, then the device may wrap around and overwrite other sections of memory.  This could lead to possible errors where specific data bytes don't appear to be set with the expected value.  Please ensure that the total MRAM allocation is less than 2k.

    You can also refer to section 4.2 of the TCAN45xx Software User's Guide (Link) for more information on allocating the MRAM and avoiding overlapping memory sections.

    Regards,

    Jonathan