Part Number: DP83TC812S-Q1
Hello!
I am having trouble reading from the TX packet count registers (0x0639, 0x063A, 0x063B). We’ve been unable to get these to read anything other than 0. We’ve confirmed traffic is being sent out the PHY, and we can see the equivalent counters for RX incrementing as expected when packets are received.
Is this a known issue? Is there undocumented behavior around register access order or timings? I’m assuming there likely isn’t, but I just wanted to check before we continue troubleshooting.