DP83826E: DP83826ERHB didn't enter MII mode due to specific batch code

Hello,

Can you please read back Reg 0x3 on both batches, and also provide a schematic of your design?

Sincerely,

Gerome

Hello Gerome,

    The value of Reg 0x3 on both batches chips are same 0xA131. Here is the schematic of our design which is almost the same to the TI demo board schematic. For example, the GPIO86 (connect to Phy chip pin 31 of strap1) goes to MCU GPIO86 directly on other page.

   Here also attached the two oscilloscope pictures of PHY chip strap 1 pin and its reset pin and there behaviors during the POR reset, from which we can see the strap1 level are different just after reset being released for issue batch (168) and good batch (228).

Thanks，

Qi Wang

Hello,

This would confirm that both PHYs are the same revision. It is pretty odd since I would expect the internal PU to always be overridden by the external PD. Can it be confirmed that the GPIO node is not driving the pin; (ie sever the connection to the MCU if there is zero ohm)?

Sincerely,

Gerome

Hello Gerome，

   "Sever the connection to the MCU" will be tested later. Now we have a solution and tested it as below:

1. We revised our firmware in MCU to identify the 168 batch PHY chip on our board by reading its mode (RMII is 168 batch chip).
2. Then we modified the PHY chip register through MCU firmware to set it as MII mode and inverted the level of its PHY_LINKSTATUS output in MCU side.
3. And then the PHY chip can be found by computer software (TWINCAT).