Part Number: DS160PR810
Hi Team,
We performed Signal Integrity analysis on the PCIe lanes by adjusting the following parameters in the redriver IBIS-AMI model, and we obtained improved SI results. For this analysis, we referred to the DS160PR810 IBIS-AMI Model User’s Guide.
The IBIS-AMI settings used are:
- eq_hi_gain = 1 (3.5 dB)
- eq_en_bypass = 0
- eq_bst1 = 6
- eq_bst2 = 6
- drv_sel_vod[0:3] = 3 (0 dB)
For the schematic implementation, we currently have provision to configure the following hardware parameters:
- CTLE settings through EQ1 and EQ0
- Flat Gain settings through GAIN1 and GAIN0
For these schematic-level settings, we referred to the DS160PR810 datasheet.
However, we cannot directly correlate the SI IBIS-AMI model settings with the device’s hard-coded EQ and GAIN pin settings.
Could you please advise which EQ and GAIN values should be selected for the schematic design so that they best match the above IBIS-AMI configuration?
Regards,
Poosanalakshmi G
