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LMH1208: Low-level holding time of SCL during interrupt handling

Shingo Ozaki
Prodigy 80 points

Part Number: LMH1208

To the team:

We are considering SMBUS communication between a master device and an LMH1208 (slave device).

The master sends a RAW command to the slave, and the slave maintains SCL low during a clock stretch period.

What is the maximum time the low signal is released, i.e., the maximum clock stretch duration?

 

Thank you in advance. 

  • 0
    Prodigy 80 points

    To the team:

    The following command and register address are sent using the RAW command.

    After sending the RAW command, SCL is fixed to Low.


    Even after waiting 30ms after it's fixed to Low, SCL does not transition from Low to High.
    How long do I need to wait for it to transition from Low to High?

    Thank you in advance. 

  • 0 in reply to Shingo Ozaki
    TI__Guru**** 193271 points

    Hi,

    Can you please share your schematic for review? 

    If a device holds SCL low and exceeds the timeout limit, every SMBus-compliant device on the bus should
    1. Abandon the current transaction immediately.
    2. Release the SCL and SDA lines.
    3. Reset its internal SMBus interface to prepare for a new start condition.

    Are you seeing SCL and SDA lines being pulled high after 35ms?

    Thanks

    David