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DP83TG720R-Q1: Delay setting

Part Number: DP83TG720R-Q1

Hello team,

My customer would like to know how to adjust delay in DP83TG720R-Q1.

Currently they made PoC with Align mode, hence no delay in PHY side.

However during validation in their system, they need to adujt delay setting in PHY side. 

Could you tell me correct delay adjust procedure? In their understanding,

  1. adjust 430h DLL_TX_DELAY_CTRL_SL bit and DLL_RX_DELAY_CTRL_SL bit
  2. DLL_EN bit changes to 1

They also find similar function in 602h, so they are confusing now.

Regards,

Youhei MIYAOKA

  • Hi Miyaoka-san,

    You referred to DLL_EN bit.  Searching through the datasheet, I didn't find "DLL_EN".  Are you referring to rx_clk_sel and tx_clk_sel fields in 602h?

    In general, I think your understanding is correct.

    1. Adjust DLL_TX_DELAY_CTRL_SL and DLL_RX_DELAY_CTRL_SL fields in 430h
    2. Set both rx_clk_sel and tx_clk_sel to '1' to enable the delayed RGMII clock.

    Thanks,

    Drew