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DP83867E: DP83867 SGMII Register Map

Joel Love
Prodigy 10 points

Part Number: DP83867E

Hello, I'm trying to troubleshoot an SGMII ethernet connection using a DP83867ERGZT and a xilinx zynqmp soc. The copper/RJ45 side looks like its working fine, and petalinux on the zynq recognizes the phy on the mdio bus and does some configuration, but the ethernet connection repeatedly connects and drops. I've probed the SGMII signals on the scope, and the TX lines (from zynq to phy) look like white noise, but are about 1V peak to peak, so it seems like the transceivers are doing something. On the RX side it also looks like white noise but about 500mV peak to peak. so it also appears to be doing something.

The phy is definitely strapped wrong - it has no straps on it at all. But petalinux does a bunch of configuration on startup. I have a full register dump of the device registers after configuration that I was hoping someone could take a look at and let me know if we have anything wrong in the register configuration. Or if the lack of straps is a huge problem, to let me know what we need to strap before it would potentially work. Thanks!

phy regs.txt 

  • 0
    TI__Genius 14850 points

    Hi Joel,

    I can take a look at the register dump. Could you also share a schematic of the PHY?

    Best regards,

    Greg

  • 0 in reply to Gregory Kobyakov
    Prodigy 10 points

    I don't think I can upload the schematic, unfortunately. I can probably describe the main details. We do have straps on RX_CTRL - a 6k pullup to 3V3 and a 2.5k pulldown to GND. We are configured for 4 wire SGMII, with the tx pair going to the fpga GTR tx lane and the rx pair going to the fpga GTR rx lane. there is a 25 mhz crystal with 27pf loading capcitors across phy pins 14/15. The MDC and MDIO pins are routed to fpga MIOs with a 1.5k pullup to 3V3 on MDIO. The three LED pins just go to LEDs with a series 470 ohm current limiting resistor to ground after the LED. Pin 12 (RBIAS) has an 11k to ground and pin 20 (JTAG_CLK) has a 1k to ground. Then we have the ethernet lines going to the magnetics and to an rj45. I know the mdio bus is working correctly, as I have probed it and can read/write the registers through the linux tools. The ethernet side appears to be correct, as the LED_0 and LED_1 leds both illuminate upon plugging in an ethernet cable to the computer, indicating a 1000GB/s link is established. the issues just seem to be on the SGMII side. LED_3 will blink intermittently as they attempt to negotiate a connection, but the computer will repeatedly say the connection failed. Let me know if you need any other information.

  • 0 in reply to Joel Love
    TI__Genius 14850 points

    Hi Joel,

    Thanks for the details, if you would like, the schematic can also be sent through E2E private messages (only visible to me).

    Best regards,

    Greg