Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869
I am having an issue where around 1/600 times that I start up my PCBA, the DP83869 doesn't come up correctly and start talking to my MCU. I'm concerned that this could be related to the rise time of the VDDIO rail, because it doesn't have a consistent linear trend that fits the >500us rise time standard.

In the scope capture from my PCBA below, yellow is 2V5, pink is 1V1, and blue is 3V3 (VDDIO). You can see that 2V5 and 1V1 rise smoothly over the course of a few ms, but the 3V3 (VDDIO) rises slowly at first and then jumps from ~300mV to 3.3V in under 500us.


A couple questions:
- What drives the 500us minimum ramp requirement for the power rails?
- Does this power up timing sequencing seem like a potential issue that could be the root cause of the occasional startup failures we see?