TCA6408A: How to understand INT resetting function ?

Part Number: TCA6408A
Other Parts Discussed in Thread: TCA9539A-Q1

Hi Experts,

your datasheet page 20 descript "INT resetting occurs in the read mode at the  acknowledge (ACK) or not acknowledge (NACK) bit after the rising edge of the SCL signal. "

i really see INT will reset at ACK, but i don't see any response at NACK.  Can you explain what scenarios  INT will reset at NACK,it should be better if you can provide waveform.

image.png

Thanks !

  • The /INT signal resets at the ACK or NACK after during a successful read from the port register. The I²C master issues an ACK if it wants to continue reading; it issues a NACK if the byte that was read is the last one. Any other NACKs belonging to other registers or devices have no effect. The reset happens just before the data byte is sent.

  • Hi Zhuangzhuang, 

    Please let me know if you have any additional questions. 

    Regards,

    Tyler

  • Hi below is a standard waveform, it shows the successful read, after the ack of repeat slave address, the INT reset. could you give me an example, what kind of NACK will reset INT ? please give me a clear wavefrom. i don't want to have unexpected INT reset.

  • 1110100 is not the address of the TCA6408A. I guess that the /INT resets because the port input voltage changed back to the original value.

  • Hi Zhuangzhuang, 

    Please check the addressing: 

    Are there any changes to the port-side, like Clemens already commented? 

    Regards,

    Tyler

  • Hi, you are right, the waveform attached before is TCA9539A, I add TCA6408A waveform as below, the waveform is not critical, my key question is what kind of NACK will reset INT ? please give me a clear waveform. i don't want to have unexpected INT...

  • The TCA6408A datasheet says:

    Resetting occurs in the read mode at the acknowledge (ACK) or not acknowledge (NACK) bit after the rising edge of the SCL signal.

    The TCA9539A-Q1 datasheet says:

    Resetting occurs in the read mode at the acknowledge (ACK) bit after the rising edge of the SCL signal. Note that the INT is reset at the ACK just before the byte of changed data is sent.

    The text in the TCA6408A datasheet is wrong because in this situation, it is not possible for a NACK to happen (if the TCA6408A does not ACK the slave address, then it does not read anything and will not change the interrupt status).

    The text in the TCA9538A-Q1 datasheet is correct for both devices.

  • Ok, it is clear, the TCA6408A datasheet is indeed confusing. Thanks !