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DP83815: Initialization sequence for DP83T815

Joao Goncalves
Prodigy 10 points

Part Number: DP83815

Hello Team,

We have integrated the Master and Slave Mode configurations exactly as defined in the application note Configuring for Open Alliance Specification Compliance (excluding the optional emission reduction steps).In addition to the baseline configuration, we write to several registers to configure custom hardware requirements like Duplex Mode, RMII, and Autonomous Mode.Our Questions for Verification:

1- Could you please review our attached initialization sequence (registers and values) and confirm if the overall sequence is correct?

2- We understand that enabling features like RMII Master (via Register 0initSequence 1.xlsx x0648) and Managed Mode (via Register 0x018C) requires writing to these specific registers in addition to the standard baseline register sets outlined in Table 3-1 and Table 3-2 of the application note. Is this understanding correct, and are there any specific sequence constraints we should observe when blending these additional writes with the baseline sequence?

Thank you for your support.

Best Regards

 

  • 0
    TI__Mastermind 29222 points

    Hi Joao,

    I will review and get back by end of week.

    Thanks,

    David

  • 0 in reply to David Creger
    TI__Mastermind 29222 points

    Hi Joao,

    Your initialization sequence is mostly correct. 

    Autonomous/managed mode should be selected by bootstrap, I would recommend removing these registers from your init. The purpose of managed mode is to prevent the link up starting before software has loaded the configuration script, so setting this mode via software negates the purpose. 

    MAC interface is also selected via bootstrap, so the write to enable RMII mode is not needed but also does not hurt.

    Thanks,

    David 

  • 0 in reply to David Creger
    Prodigy 50 points

    Hello David, 

    Thank you for the response. 

    So, you suggest removing the registers 0x648, 0x18B and 0x18C which are responsible for RMII Master and Autonomous/Managed mode setting from the initialization sequence.  

    I have updated the initSequence based on your inputs and attached below, could you please confirm if this would be the complete sequence.

    And after doing the above change the MAC-Interface will be selected via bootstrap to RMII Master if PHY is initialized as Master and likewise. Is my understanding correct?

    Regards,

    Annwesa

    initSequence_TI.xlsx

  • 0 in reply to Annwesa Bhattacharya
    TI__Mastermind 29222 points

    Hi Annwesa,

    Yes, sequence looks good.

    MDI master/slave and RMII master/slave are two different topics. Both can be independently chosen by strap selection, shown in section 7.5 of the datasheet.

    Thanks,

    David

  • 0 in reply to David Creger
    Prodigy 50 points

    Hello David, 

    Since we are not using bootstrapping in our project, the above initialization sequence does not work for us. The link remains down. 

    1. For the link up, we have to add the Autonomous or Managed Mode selection with the above sequence. 

    The approach we follow is either of the below (1. or 2.) based on configuration - 

    a.  Autonomous Mode is selected, write register 0x018B to 0x0040. 

    b. Managed Mode is selected, wirte register 0x018B to 0x0000 and 0x18C to 0x0001. 

    The above sequence of Mode selection is done towards the end of the initialization sequence after all the interoperability registers are written and Enable Transmitter is done via write 0x0000 to the register 0x0523. 

    Could you please confirm if this is being done correctly? 

    2. When RMII as SLAVE is configured, the link is always down.

    The RMII interface selection is also done as part of the init sequence and at a similar sequence position as mode selection above, and the approach we follow is (1. or 2.) - 

    1. RMII is configured as MASTER, write register 0x0648 to 0x0140. 

    2. RMII is configured as SLAVE, write register 0x0648 to 0x0150. 

    When point 2 is done, i.e. RMII as SLAVE the link is always down.  This is the situation even after the link down issue is resolved by writing to the Managed/Autonomous mode registers. 

    Could you please tell us why this is the case or some additional steps has to be done here? 

    Kindly let us know at the earliest since this is a blocker for our release. 

    Thanks in Advance, 

    Regards,

    Annwesa

  • 0 in reply to Annwesa Bhattacharya
    TI__Mastermind 29222 points

    Hi Annwesa,

    Please share your schematic with me, so I can see your configuration. 

    RMII slave expects a 50Mhz clock on XI. RMII master expects a 25Mhz clock/crystal on XI. If a 25Mhz crystal is present, PHY will not operate correctly if RMII slave is selected.

    Thanks,

    David

  • 0 in reply to David Creger
    Prodigy 50 points

    Hello David, 

    I have requested for the HW Schematic and will share with you once I have it. 

    Meanwhile, on the Autonomous and Managed Mode selection , it is not possible for us to use Bootstrapping. 

    Could you please confirm if the below approach is correct.

    The approach we follow is either of the below (a. or b.) based on configuration - 

    a. Autonomous Mode is selected, write register 0x018B to 0x0040. 

    b. Managed Mode is selected, write register 0x018B to 0x0000 and 0x18C to 0x0001. 

    c. The above sequence of Mode selection is done towards the end of the initialization sequence after all the interoperability registers are written and Enable Transmitter is done via write 0x0000 to the register 0x0523

    d. Note: The default value, as per datasheet, for 0x18B is 0x1CB4 and we are overwriting that. Can you suggest if we should instead just set/reset the 6th bit 'Autonomous Mode' and not overwrite all the bits to 0x00 ? 

    Thanks, 

    Annwesa

  • 0 in reply to Annwesa Bhattacharya
    TI__Mastermind 29222 points

    Hi Annwesa,

    Autonomous/managed mode selection is not possible by register write. If you are not selecting managed mode by bootstrap, you are in autonomous mode. I would recommend having a look at section 7.4.1 and 7.5 of the datasheet.

    Regarding your last comment, yes, it is recommended to not overwrite other bits in register 0x18B when only intending to write to bit[6].

    Thanks,

    David