TCA6408A: P0-P7 leakage

Part Number: TCA6408A
Other Parts Discussed in Thread: TCA6408

Hi,

I would like to consult with you regarding the application of the TCA6408 IO-EXPANDER. Are there any leakage current concerns when using three of them on the board? Below is our usage architecture:

  • P0–P3: Connected to backend device IOs, powered by Standby Power.

  • P4–P7: Connected to backend devices, powered by Main Power.

  • VCCI and RESET: Both use Main Power.

Usage Scenario: When our motherboard (MB) is shut down, Main Power is off while Standby Power remains active (similar to an S5 state).

  • Q1: When the system is shut down, since VCC is powered by Standby Power, will there be leakage current from VCC to the P4–P7 Main Power IO pins? Or will internal transistors Q1 and Q2 be turned off in this state, preventing current from leaking to P4–P7?

  • Q2: When the system is shut down with Main Power off and RESET pulled LOW, P0–P7 will enter a high-impedance (High-Z) state because internal transistors Q1 and Q2 are off. However, will P0–P3 current flow through the internal body diodes of Q1 to VCC? Therefore, is it required that P0–P3 and VCC share the same power sequencing?"

Thanks!

Jeff

  • Hi Jeff,

    We are still looking into this and will follow up soon.

    Regards,

    Jack

  • Hi Jeff,

    I assume the main power supply is connected to VCCI pin. Standby power refers to the VCCP connection .

    Q1: When the system is shut down, since VCC is powered by Standby Power, will there be leakage current from VCC to the P4–P7 Main Power IO pins? Or will internal transistors Q1 and Q2 be turned off in this state, preventing current from leaking to P4–P7?

    The transistors should be turned off when VCCI = 0V and a VCCP is present. 

    Q2: When the system is shut down with Main Power off and RESET pulled LOW, P0–P7 will enter a high-impedance (High-Z) state because internal transistors Q1 and Q2 are off. However, will P0–P3 current flow through the internal body diodes of Q1 to VCC? Therefore, is it required that P0–P3 and VCC share the same power sequencing?"

    The simplified schematic only shows ESD protection diode from GND to P0-P7. 

    So when VCCI = OFF, RESET = LOW, I don't see a path from Q1 to VCCP. 

    Regards,

    Tyler

  • Hi Tyler,

    Got it, thank you!

    Jeff