Part Number: GD75232
Other Parts Discussed in Thread: GD65232, TRS3243E, TMUX7462F
I note that the datasheet for GD75232 says in section 5.2 Recommended Operating Conditions, Note 1:
When powering up the GD65232 and GD75232, the following sequence should be used:
VSS, VDD, VCC, I/Os
Applying VCC before VDD may allow large currents to flow, causing damage to the device. When powering down the GD65232 and GD75232, the reverse sequence should be used
Could some elaboration be provided on the potential issues caused, and the reason why?
In my design I may have an infrequent usage scenario where the GD75232 is powered by VCC (with +5V) when VDD and VSS supplies are not present. The scenario is when a firmware update is being performed on an embedded microcontroller, where +5V is being supplied to VCC by USB, but the regular PSU is not connected and thus not delivering +12V and -12V to VDD and VSS (that is, they will be floating, not at 0V).
I also do not see any such note or caution in the datasheets of other pin-compatible 75232 devices from other manufacturers, so I am wondering if this issue is specific to TI, or these other manufacturers simply do not mention it.
If such a scenario is definitely not recommended, can any suggestions be made as to how I can gate VCC to the GD75232 in the presence/absence of VDD and VSS?